Multiprocessor system-on-chip (MPSoC) technology
The multiprocessor system-on-chip (MPSoC) uses multiple CPUs along with other hardware
subsystems to implement a system. A wide range of MPSoC architectures have been …
subsystems to implement a system. A wide range of MPSoC architectures have been …
[图书][B] Computer organization and architecture: designing for performance
W Stallings - 2003 - books.google.com
OBJECTIVES This book is about the structure and function of computers. Its purpose is to
present, as clearly and completely as possible, the nature and characteristics of modern-day …
present, as clearly and completely as possible, the nature and characteristics of modern-day …
Web search for a planet: The Google cluster architecture
Amenable to extensive parallelization, Google's web search application lets different queries
run on different processors and, by partitioning the overall index, also lets a single query use …
run on different processors and, by partitioning the overall index, also lets a single query use …
Single-ISA heterogeneous multi-core architectures for multithreaded workload performance
A single-ISA heterogeneous multi-core architecture is achip multiprocessor composed of
cores of varying size, performance, and complexity. This paper demonstrates that …
cores of varying size, performance, and complexity. This paper demonstrates that …
Hyper-Threading Technology Architecture and Microarchitecture.
DT Marr, F Binns, DL Hill, G Hinton… - Intel Technology …, 2002 - search.ebscohost.com
Abstract Intel's Hyper-Threading Technology brings the concept of simultaneous multi-
threading to the Intel Architecture. Hyper-Threading Technology makes a single physical …
threading to the Intel Architecture. Hyper-Threading Technology makes a single physical …
Multithreaded processors
T Ungerer, B Robič, J Šilc - The Computer Journal, 2002 - academic.oup.com
The instruction-level parallelism found in a conventional instruction stream is limited. Studies
have shown the limits of processor utilization even for today's superscalar microprocessors …
have shown the limits of processor utilization even for today's superscalar microprocessors …
Clock rate versus IPC: The end of the road for conventional microarchitectures
V Agarwal, MS Hrishikesh, SW Keckler… - Proceedings of the 27th …, 2000 - dl.acm.org
The doubling of microprocessor performance every three years has been the result of two
factors: more transistors per chip and superlinear scali ng of the processor clock with …
factors: more transistors per chip and superlinear scali ng of the processor clock with …
Smart memories: A modular reconfigurable architecture
Trends in VLSI technology scaling demand that future computing devices be narrowly
focused to achieve high performance and high efficiency, yet also target the high volumes …
focused to achieve high performance and high efficiency, yet also target the high volumes …
Interconnections in multi-core architectures: Understanding mechanisms, overheads and scaling
R Kumar, V Zyuban, DM Tullsen - … International Symposium on …, 2005 - ieeexplore.ieee.org
This paper examines the area, power, performance, and design issues for the on-chip
interconnects on a chip multiprocessor, attempting to present a comprehensive view of a …
interconnects on a chip multiprocessor, attempting to present a comprehensive view of a …
Piranha: A scalable architecture based on single-chip multiprocessing
LA Barroso, K Gharachorloo, R McNamara… - ACM SIGARCH …, 2000 - dl.acm.org
The microprocessor industry is currently struggling with higher development costs and
longer design times that arise from exceedingly complex processors that are pushing the …
longer design times that arise from exceedingly complex processors that are pushing the …