Fidelity: Efficient resilience analysis framework for deep learning accelerators
We present a resilience analysis framework, called FIdelity, to accurately and quickly
analyze the behavior of hardware errors in deep learning accelerators. Our framework …
analyze the behavior of hardware errors in deep learning accelerators. Our framework …
Clear: C ross-l ayer e xploration for a rchitecting r esilience-combining hardware and software techniques to tolerate soft errors in processor cores
We present a first of its kind framework which overcomes a major challenge in the design of
digital systems that are resilient to reliability failures: achieve desired resilience targets at …
digital systems that are resilient to reliability failures: achieve desired resilience targets at …
Learning-based modeling and optimization for real-time system availability
As the density of integrated circuits continues to increase, the possibility that real-time
systems suffer from soft and hard errors rises significantly, resulting in a degraded …
systems suffer from soft and hard errors rises significantly, resulting in a degraded …
A comparison of the SEU response of planar and FinFET D flip-flops at advanced technology nodes
Heavy-ion experimental results were used to characterize single-event upset trends in 16
nm bulk FinFET, 20 nm bulk planar, and 28 nm bulk planar D flip-flops. Experimental data …
nm bulk FinFET, 20 nm bulk planar, and 28 nm bulk planar D flip-flops. Experimental data …
Characterizing SRAM and FF soft error rates with measurement and simulation
M Hashimoto, K Kobayashi, J Furuta, SI Abe… - Integration, 2019 - Elsevier
Soft error originating from cosmic ray is a serious concern for reliability demanding
applications, such as autonomous driving, supercomputer, and public transportation system …
applications, such as autonomous driving, supercomputer, and public transportation system …
Angular effects on single-event mechanisms in bulk FinFET technologies
P Nsengiyumva, LW Massengill… - … on Nuclear Science, 2017 - ieeexplore.ieee.org
Angular single-event (SE) mechanisms and experimental upset data for 14-/16-nm bulk fin
field-effect transistor (FinFET) technologies are presented and analyzed. The discrete …
field-effect transistor (FinFET) technologies are presented and analyzed. The discrete …
Effects of threshold voltage variations on single-event upset response of sequential circuits at advanced technology nodes
Threshold voltage (VT) of transistors plays an important role in single-event upsets (SEU)
and system power consumption. Effect of VT on single-event upsets can be very different for …
and system power consumption. Effect of VT on single-event upsets can be very different for …
Characterization of heavy-ion-induced single-event effects in 65 nm bulk CMOS ASIC test chips
Two 65 nm bulk complementary metal-oxide-semiconductor (CMOS) digital application-
specific integrated circuit (ASIC) chips were designed, and then tested in a heavy ion …
specific integrated circuit (ASIC) chips were designed, and then tested in a heavy ion …
Radiation hardened 12T SRAM with crossbar-based peripheral circuit in 28nm CMOS technology
Y Han, T Li, X Cheng, L Wang, J Han… - … on Circuits and …, 2021 - ieeexplore.ieee.org
Conventional hardened cells are not robust enough to single event upset (SEU) in 28nm
technology due to the scaling of the transistors. High soft error rate is caused by particle …
technology due to the scaling of the transistors. High soft error rate is caused by particle …
Tolerating soft errors in processor cores using clear (cross-layer exploration for architecting resilience)
We present cross-layer exploration for architecting resilience, a first of its kind framework
which overcomes a major challenge in the design of digital systems that are resilient to …
which overcomes a major challenge in the design of digital systems that are resilient to …