Composable memory transactions
Writing concurrent programs is notoriously difficult, and is of increasing practical importance.
A particular source of concern is that even correctly-implemented concurrency abstractions …
A particular source of concern is that even correctly-implemented concurrency abstractions …
Transactional memory architecture and implementation for IBM System z
C Jacobi, T Slegel, D Greiner - 2012 45th Annual IEEE/ACM …, 2012 - ieeexplore.ieee.org
We present the introduction of transactional memory into the next generation IBM System z
CPU. We first describe the instruction-set architecture features, including requirements for …
CPU. We first describe the instruction-set architecture features, including requirements for …
LogTM-SE: Decoupling hardware transactional memory from caches
This paper proposes a hardware transactional memory (HTM) system called LogTM
Signature Edition (LogTM-SE). LogTM-SE uses signatures to summarize a transactions read …
Signature Edition (LogTM-SE). LogTM-SE uses signatures to summarize a transactions read …
An effective hybrid transactional memory system with strong isolation guarantees
We propose signature-accelerated transactional memory (SigTM), ahybrid TM system that
reduces the overhead of software transactions. SigTM uses hardware signatures to track the …
reduces the overhead of software transactions. SigTM uses hardware signatures to track the …
Performance pathologies in hardware transactional memory
Hardware Transactional Memory (HTM) systems reflect choices from three key design
dimensions: conflict detection, version management, and conflict resolution. Previously …
dimensions: conflict detection, version management, and conflict resolution. Previously …
PowerPi: Measuring and modeling the power consumption of the Raspberry Pi
F Kaup, P Gottschling… - 39th Annual IEEE …, 2014 - ieeexplore.ieee.org
An increasing number of households is connected to the Internet via DSL or cable, for which
home gateways are required. The optimization of these-caused by their large number-is a …
home gateways are required. The optimization of these-caused by their large number-is a …
Robust architectural support for transactional memory in the power architecture
HW Cain, MM Michael, B Frey, C May… - ACM SIGARCH …, 2013 - dl.acm.org
On the twentieth anniversary of the original publication [10], following ten years of intense
activity in the research literature, hardware support for transactional memory (TM) has finally …
activity in the research literature, hardware support for transactional memory (TM) has finally …
Is transactional programming actually easier?
CJ Rossbach, OS Hofmann, E Witchel - Proceedings of the 15th acm …, 2010 - dl.acm.org
Chip multi-processors (CMPs) have become ubiquitous, while tools that ease concurrent
programming have not. The promise of increased performance for all applications through …
programming have not. The promise of increased performance for all applications through …
ScalaTrace: Scalable compression and replay of communication traces for high-performance computing
Characterizing the communication behavior of large-scale applications is a difficult and
costly task due to code/system complexity and long execution times. While many tools to …
costly task due to code/system complexity and long execution times. While many tools to …
[图书][B] Shared-memory synchronization
ML Scott, T Brown - 2013 - Springer
This monograph grows out of nearly 40 years of experience in synchronization and
concurrent data structures. Though written primarily from the perspective of systems …
concurrent data structures. Though written primarily from the perspective of systems …