Main memory (DRAM) consumes as much as half of the total system power in a computer
today, due to the increasing demand for memory capacity and bandwidth. There is a …

In this paper, we describe the IBM POWER8™ cache, interconnect, memory, and
input/output subsystems, collectively referred to as the “nest.” This paper focuses on the …

3D-stacking technology has enabled the option of embedding a large DRAM cache onto the
processor. Since the DRAM cache can be orders of magnitude larger than a conventional …

Due to continuous decreasing feature size and increasing device density, on-chip caches
have been becoming susceptible to single event upsets, which will result in multi-bit soft …

Matrix transposition is an important algorithmic building block for many numeric algorithms
like multidimensional FFT. It has also been used to convert the storage layout of arrays …

As the gap between processor speed and memory speed continues to increase, memory
system becomes the performance bottleneck of the processor. The memory system of stream …

The processor-memory gap is widening every year with no prospect of reprieve. More and
more latency is being added to program runtimes as memory cannot satisfy the demands of …

One major hindrance towards further research is the relative lack of information available on
the low-level power consumption behavior of modern DRAM devices. It has historically been …

Design Space Exploration of Vector Architectures for Multimedia Applications (マルチメディア
アプリケーションの Page 1 TOHOKU UNIVERSITY Graduate School of Information Sciences …

Design Space Exploration of Vector Architectures for Multimedia Applications (マルチメディア
アプリケーションの Page 1 TOHOKU UNIVERSITY Graduate School of Information Sciences …