Effective and efficient routing is one of the most important parts of routing in NoC‐based
neuromorphic systems. In fact, this communication structure connects different units through …

Increasing fault rates in current and future technology nodes coupled with on-chip
components in the hundreds calls for robust and fault-tolerant Network-on-Chip (NoC) …

Spiking Neuromorphic systems have been introduced as promising platforms for energy-
efficient spiking neural network (SNNs) execution. SNNs incorporate neuronal and synaptic …

Fault tolerance and adaptive capabilities are challenges for modern networks-on-chip (NoC)
due to the increase in physical defects in advanced manufacturing processes. Two novel …

A novel adaptive routing algorithm–Efficient Dynamic Adaptive Routing (EDAR) is proposed
to provide a fault-tolerant capability for Networks-on-Chip (NoC) via an efficient routing path …

During the last few decades, Three-dimensional Network-on-Chips (3D-NoCs) have been
showing their advantages against 2D-NoC architectures. This is thanks to the reduced …

A few decades ago, communication inside the chip is done by transferring signals between
the cores. This conventional method is not worthy because of the increase in latency and …

2D-NoCs have been the mainstream approach used to interconnect multi-core systems. 3D-
NoCs have emerged to compensate for deficiencies of 2D-NoCs such as long latency and …

Abstract The Network-on-Chip (NoC) paradigm has been proposed as a favorable solution
to handle the strict communication requirements between the increasingly large number of …

WiNoC has become a promising on-chip interconnect architecture. Due to the integration
and manufacturing limits of wireless interconnects in nanotechnology, WiNoC systems are …