Chip multicore processors (CMPs) have emerged as the dominant architecture choice for
modern computing platforms and will most likely continue to be dominant well into the …

Package-level integration using multi-chip-modules (MCMs) is a promising approach for
building large-scale systems. Compared to a large monolithic die, an MCM combines many …

This paper investigates the problem of partitioning a shared cache between multiple
concurrently executing applications. The commonly used LRU policy implicitly partitions a …

A significant part of future microprocessor real estate will be dedicated to 12 or 13 caches.
These on-chip caches will heavily impact processor performance, power dissipation, and …

Magnetic random access memory (MRAM) is a promising memory technology, which has
fast read access, high density, and non-volatility. Using 3D heterogeneous integrations, it …

Increases in on-chip communication delay and the large working sets of server and scientific
workloads complicate the design of the on-chip last-level cache for multicore processors …

Caching techniques have been an efficient mechanism for mitigating the effects of the
processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies …

Shared memory architectures have recently experienced a large increase in thread-level
parallelism, leading to complex memory hierarchies with multiple cache memory levels and …

Long interconnects are becoming an increasingly important problem from both power and
performance perspectives. This motivates designers to adopt on-chip network-based …

Scale-out datacenters mandate high per-server throughput to get the maximum benefit from
the large TCO investment. Emerging applications (eg, data serving and web search) that run …