Low voltage analog circuit design techniques: A tutorial

S Yan, E Sanchez-Sinencio - IEICE Transactions on Fundamentals …, 2000 - search.ieice.org
Low voltage (LV) analog circuit design techniques are addressed in this tutorial. In
particular,(i) technology considerations;(ii) transistor model capable to provide performance …

[图书][B] Analysis and design of analog integrated circuits

PR Gray, PJ Hurst, SH Lewis, RG Meyer - 2024 - books.google.com
ANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS Authoritative and
comprehensive textbook on the fundamentals of analog integrated circuits, with learning …

A compact power-efficient 3 V CMOS rail-to-rail input/output operational amplifier for VLSI cell libraries

R Hogervorst, JP Tero, RGH Eschauzier… - IEEE journal of solid …, 1994 - ieeexplore.ieee.org
This paper presents a two-stage, compact, power-efficient 3 V CMOS operational amplifier
with rail-to-rail input and output ranges. Because of its small die area of 0.04 mm/sup 2/, it is …

Comparator-based switched-capacitor circuits for scaled CMOS technologies

JK Fiorenza, T Sepke, P Holloway… - IEEE Journal of Solid …, 2006 - ieeexplore.ieee.org
A comparator-based switched-capacitor circuit (CBSC) technique is presented for the design
of analog and mixed-signal circuits in scaled CMOS technologies. The technique involves …

[HTML][HTML] Classification and design space exploration of low-power three-stage operational transconductance amplifier architectures for wide load ranges

J Riad, JJ Estrada-López, E Sánchez-Sinencio - Electronics, 2019 - mdpi.com
Since operational transconductance amplifiers (OTAs) form the basic building blocks of
many analog systems, the compensation of three-stage OTAs has attracted a lot of attention …

[图书][B] The VLSI handbook

WK Chen - 1999 - taylorfrancis.com
Over the years, the fundamentals of VLSI technology have evolved to include a wide range
of topics and a broad range of practices. To encompass such a vast amount of knowledge …

Advances in reversed nested Miller compensation

AD Grasso, G Palumbo… - IEEE Transactions on …, 2007 - ieeexplore.ieee.org
The use of two frequency compensation schemes for three-stage operational
transconductance amplifiers, namely the reversed nested Miller compensation with nulling …

Inverter-Based Subthreshold Amplifier Techniques and Their Application in 0.3-V -Modulators

L Lv, X Zhou, Z Qiao, Q Li - IEEE Journal of Solid-State Circuits, 2019 - ieeexplore.ieee.org
Subthreshold amplifiers suffer from the limited voltage headroom which leaves little space
for conventional analog techniques to enhance performance and efficiency. This paper …

1-V rail-to-rail CMOS opamp with improved bulk-driven input stage

JM Carrillo, G Torelli, RPA Valverde… - IEEE Journal of Solid …, 2007 - ieeexplore.ieee.org
This paper introduces a CMOS operational amplifier with rail-to-rail input and output voltage
ranges, suitable for operation in extremely low-voltage environments. The approach is …

A 12-bit 80-MSample/s pipelined ADC with bootstrapped digital calibration

CR Grace, PJ Hurst, SH Lewis - IEEE Journal of Solid-State …, 2005 - ieeexplore.ieee.org
This paper presents a prototype analog-to-digital converter (ADC) that uses a calibration
algorithm to adaptively overcome constant closed-loop gain errors, closed-loop gain …