Design of ultra-low-cost UHF RFID tags for supply chain applications
R Glidden, C Bockorick, S Cooper… - IEEE …, 2004 - ieeexplore.ieee.org
The availability of inexpensive CMOS technologies that perform well at microwave
frequencies has created new opportunities for automated material handling within supply …
frequencies has created new opportunities for automated material handling within supply …
915-MHz FSK/OOK wireless neural recording SoC with 64 mixed-signal FIR filters
K Abdelhalim, L Kokarovtseva… - IEEE Journal of Solid …, 2013 - ieeexplore.ieee.org
A system-on-chip (SoC) neural recording interface with 64 channels, 64 16-tap
programmable mixed-signal FIR filters and a fully integrated 915 MHz OOK/FSK PLL-based …
programmable mixed-signal FIR filters and a fully integrated 915 MHz OOK/FSK PLL-based …
A digitally enhanced dynamically reconfigurable analog platform for low-power signal processing
CR Schlottmann, S Shapero, S Nease… - IEEE Journal of Solid …, 2012 - ieeexplore.ieee.org
We present a field-programmable analog array designed for accurate low-power mixed-
signal computation. This 25-mm 2 350 nm-CMOS reconfigurable analog IC incorporates …
signal computation. This 25-mm 2 350 nm-CMOS reconfigurable analog IC incorporates …
Adaptive CMOS: from biological inspiration to systems-on-a-chip
C Diorio, D Hsu, M Figueroa - Proceedings of the IEEE, 2002 - ieeexplore.ieee.org
Local long-term adaptation is a well-known feature of the synaptic junctions in nerve tissue.
Neuroscientists have demonstrated that biology uses local adaptation both to tune the …
Neuroscientists have demonstrated that biology uses local adaptation both to tune the …
A reconfigurable mixed-signal VLSI implementation of distributed arithmetic used for finite-impulse response filtering
E Ozalevli, W Huang, PE Hasler… - IEEE Transactions on …, 2008 - ieeexplore.ieee.org
A reconfigurable implementation of distributed arithmetic (DA) for post-processing
applications is described. The input of DA is received in digital form and its analog …
applications is described. The input of DA is received in digital form and its analog …
Mixed-domain systems and signal processing based on input decomposition
Y Tsividis - IEEE Transactions on Circuits and Systems I …, 2006 - ieeexplore.ieee.org
Using input decomposition as a starting point, a variety of new types of systems and signal
processors, which mix together domains traditionally kept separate, are derived, and their …
processors, which mix together domains traditionally kept separate, are derived, and their …
Non-volatile memory devices having floating-gates FETs with different source-gate and drain-gate border lengths
AE Horch - US Patent 7,939,861, 2011 - Google Patents
Non-volatile memory (NVM) devices are disclosed. In one aspect, a NVM device may
include a substrate, and a field-effect transistor (FET). The FET may include a first doped …
include a substrate, and a field-effect transistor (FET). The FET may include a first doped …
A 19.2 GOPS mixed-signal filter with floating-gate adaptation
M Figueroa, S Bridges, D Hsu… - IEEE Journal of Solid …, 2004 - ieeexplore.ieee.org
We have built a 48-tap, mixed-signal adaptive FIR filter with 8-bit digital input and an analog
output with 10 bits of resolution. The filter stores its tap weights in nonvolatile analog …
output with 10 bits of resolution. The filter stores its tap weights in nonvolatile analog …
One time programmable memory test structures and methods
CA Lindhorst, TE Humes, AE Horch… - US Patent 8,122,307, 2012 - Google Patents
5, 801994. A 9, 1998 Changeal 6,573,765 B2 6/2003 Bales et al. 5823, 714. A 10/1998 Cato
6,590,825 B2 7/2003 Tran et al. 5,825,063 A 10/1998 Diorio et al. 88.8 R 858 My et al …
6,590,825 B2 7/2003 Tran et al. 5,825,063 A 10/1998 Diorio et al. 88.8 R 858 My et al …
Non-volatile memory cell circuit with programming through band-to-band tunneling and impact ionization gate current
AE Horch - US Patent 7,508,719, 2009 - Google Patents
Electronic circuitry is described having a first transistor having a first gate dielectric located
between an electrically floating gate and a semiconductor substrate. The first injection …
between an electrically floating gate and a semiconductor substrate. The first injection …