[图书][B] VLSI test principles and architectures: design for testability
This book is a comprehensive guide to new DFT methods that will show the readers how to
design a testable and quality product, drive down test cost, improve product quality and …
design a testable and quality product, drive down test cost, improve product quality and …
[图书][B] System-on-chip test architectures: nanometer design for testability
LT Wang, CE Stroud, NA Touba - 2010 - books.google.com
Modern electronics testing has a legacy of more than 40 years. The introduction of new
technologies, especially nanometer technologies with 90nm or smaller geometry, has …
technologies, especially nanometer technologies with 90nm or smaller geometry, has …
A dual-mode built-in self-test technique for capacitive MEMS devices
X Xiong, YL Wu, WB Jone - IEEE Transactions on …, 2005 - ieeexplore.ieee.org
A dual-mode built-in self-test (BIST) scheme which partitions the fixed (instead of movable)
capacitance plates of a capacitive microelectromechanical system (MEMS) device is …
capacitance plates of a capacitive microelectromechanical system (MEMS) device is …
Built-in self test of CMOS-MEMS accelerometers
N Deb, RD Blanton - Proceedings. International Test …, 2002 - ieeexplore.ieee.org
A built-in self-test technique for MEMS that is applicable to symmetrical microstructures is
described. A combination of existing layout features and additional circuitry is used to make …
described. A combination of existing layout features and additional circuitry is used to make …
An electrical-stimulus-only BIST IC for capacitive MEMS accelerometer sensitivity characterization
MK Ozel, M Cheperak, T Dar, S Kiaei… - IEEE Sensors …, 2016 - ieeexplore.ieee.org
Testing and calibration constitute a major part of the overall manufacturing cost of
microelectromechanical system (MEMS) devices. A physical-stimulus-free built-in-selftest …
microelectromechanical system (MEMS) devices. A physical-stimulus-free built-in-selftest …
Built-in self-test of MEMS accelerometers
N Deb, RD Blanton - Journal of microelectromechanical …, 2006 - ieeexplore.ieee.org
A built-in self-test technique that is applicable to symmetric microsystems is described. A
combination of existing layout features and additional circuitry is used to make …
combination of existing layout features and additional circuitry is used to make …
[图书][B] Simulation-based design under uncertainty for compliant microelectromechanical systems
JW Wittwer - 2005 - search.proquest.com
The high cost of experimentation and product development in the field of
microelectromechanical systems (MEMS) has led to a greater emphasis on simulation …
microelectromechanical systems (MEMS) has led to a greater emphasis on simulation …
Multi-modal built-in self-test for symmetric microsystems
N Deb, RD Blanton - 22nd IEEE VLSI Test Symposium, 2004 …, 2004 - ieeexplore.ieee.org
A mathematical model analyzing the efficacy of a built-in self-test technique, applicable to
any symmetrical MEMS microstructure, is developed. The model predicts that the BIST …
any symmetrical MEMS microstructure, is developed. The model predicts that the BIST …
Built-in self test of MEMS
N Deb, RDS Blanton - US Patent 7,152,474, 2006 - Google Patents
BACKGROUND The present disclosure is directed to a built-in, self-test 20 technique for
MicroElectroMechanical systems (MEMS) that is applicable to symmetrical microstructures …
MicroElectroMechanical systems (MEMS) that is applicable to symmetrical microstructures …