Analog to digital converters (ADC): A literature review

H Dalmia, SK Sinha - E3S Web of Conferences, 2020 - e3s-conferences.org
The signal processing is advancing day by day as its needs and in wireline/wireless
communication technology from 2G to 4G cellular communication technology with CMOS …

A 12-bit time-interleaved 400-MS/s pipelined ADC with split-ADC digital background calibration in 4,000 conversions/channel

TC Hung, FW Liao, TH Kuo - IEEE Transactions on Circuits and …, 2019 - ieeexplore.ieee.org
Split analog-to-digital converter (ADC) digital background calibration with full-input-range
error detection schemes is proposed to rapidly correct the gain and nonlinearity errors in the …

An efficient background calibration technique for analog-to-digital converters based on neural network

H Deng, Y Hu, L Wang - Integration, 2020 - Elsevier
This paper introduces a background digital calibration algorithm based on neural network,
which can adaptively calibrate multiple non-ideal factors in a single-channel ADC, such as …

Statistics-based digital background calibration of residue amplifier nonlinearity in pipelined ADCs

H Mafi, M Yargholi, M Yavari - IEEE Transactions on Circuits …, 2018 - ieeexplore.ieee.org
In this paper, a statistics-based digital background calibration technique for pipelined analog-
to-digital converters (ADCs) is presented. This technique employs the residue voltage …

A Self-Calibration Method of a Pipeline ADC Based on Dynamic Capacitance Allotment

S Chatterjee, S Roy - IEEE Transactions on Very Large Scale …, 2022 - ieeexplore.ieee.org
This manuscript introduces a low-power mixed-signal foreground calibration algorithm of a
pipeline analog-to-digital converter (ADC) using a digitally controlled reconfigurable …

Digital background calibration algorithm for pipelined ADC based on time-delay neural network with genetic algorithm feature selection

Y Yin, L Li, J Li, Y Song, H Deng, H Chen, L Wu, M Li… - Integration, 2025 - Elsevier
This paper presents a novel background calibration method for pipelined analog-to-digital
converters (ADCs) using a time-delay neural network (TDNN), which is optimized through …

[HTML][HTML] A split-based digital background calibration of pipelined analog-to-digital converters by cubic spline interpolation filtering

E Zia, E Farshidi, A Kosarian - Circuits, Systems, and Signal Processing, 2019 - Springer
In this paper, a digital background calibration technique for pipelined analog-to-digital
converter (ADC) based on the concept of split architecture is proposed to address finite dc …

A histogram-based digital background calibration technique for pipelined A/D converters

S Yahyaee, M Yavari - 2022 Iranian International Conference …, 2022 - ieeexplore.ieee.org
This paper presents a digital background calibration technique for pipelined analog-to-
digital converters (ADCs) to correct the gain error due to the capacitors mismatch and finite …

A real-time pseudo-background gain calibration strategy for residue amplifiers of pipeline ADCs

S Kazeminia - Integration, 2019 - Elsevier
A pseudo-background continuous-time strategy is developed for gain and offset calibration
in open-loop inter-stage residue amplifiers of pipeline ADCs. The ping-pong calibration …

New approach for digital calibration of pipelined analog to digital converters based on secant method

E Zia, A Shamsi, J Mazloum - Integration, 2022 - Elsevier
This paper presents a new method for linear and nonlinear errors of pipelined analog to
digital converters (ADCs) based on numerical analysis. The main contribution of this work is …