Evaluation of Blue Gene/Q hardware support for transactional memories
This paper describes an end-to-end system implementation of the transactional memory
(TM) programming model on top of the hardware transactional memory (HTM) of the Blue …
(TM) programming model on top of the hardware transactional memory (HTM) of the Blue …
PowerPi: Measuring and modeling the power consumption of the Raspberry Pi
F Kaup, P Gottschling… - 39th Annual IEEE …, 2014 - ieeexplore.ieee.org
An increasing number of households is connected to the Internet via DSL or cable, for which
home gateways are required. The optimization of these-caused by their large number-is a …
home gateways are required. The optimization of these-caused by their large number-is a …
A comprehensive strategy for contention management in software transactional memory
In Software Transactional Memory (STM), contention management refers to the mechanisms
used to ensure forward progress--to avoid livelock and starvation, and to promote …
used to ensure forward progress--to avoid livelock and starvation, and to promote …
Flexible decoupled transactional memory support
A high-concurrency transactional memory (TM) implementation needs to track concurrent
accesses, buffer speculative updates, and manage conflicts. We present a system, FlexTM …
accesses, buffer speculative updates, and manage conflicts. We present a system, FlexTM …
Hardware transactional memory for GPU architectures
WWL Fung, I Singh, A Brownsword… - Proceedings of the 44th …, 2011 - dl.acm.org
Graphics processor units (GPUs) are designed to efficiently exploit thread level parallelism
(TLP), multiplexing execution of 1000s of concurrent threads on a relatively smaller set of …
(TLP), multiplexing execution of 1000s of concurrent threads on a relatively smaller set of …
RingSTM: scalable transactions with a single atomic instruction
Existing Software Transactional Memory (STM) designs attach metadata to ranges of shared
memory; subsequent runtime instructions read and update this metadata in order to ensure …
memory; subsequent runtime instructions read and update this metadata in order to ensure …
Design and implementation of transactional constructs for C/C++
Y Ni, A Welc, AR Adl-Tabatabai, M Bach… - Proceedings of the 23rd …, 2008 - dl.acm.org
This paper presents a software transactional memory system that introduces first-class C++
language constructs for transactional programming. We describe new C++ language …
language constructs for transactional programming. We describe new C++ language …
Chronos: Efficient speculative parallelism for accelerators
M Abeydeera, D Sanchez - Proceedings of the Twenty-Fifth International …, 2020 - dl.acm.org
We present Chronos, a framework to build accelerators for applications with speculative
parallelism. These applications consist of atomic tasks, sometimes with order constraints …
parallelism. These applications consist of atomic tasks, sometimes with order constraints …
Transactional memory
J Larus, C Kozyrakis - Communications of the ACM, 2008 - dl.acm.org
Transactional memory Page 1 80 communications of the acm | JULY 2008 | voL. 51 | no. 7
review articles complex processor architectures. The era did not stop because Moore’s Lawa …
review articles complex processor architectures. The era did not stop because Moore’s Lawa …
EazyHTM: Eager-lazy hardware transactional memory
Transactional Memory aims to provide a programming model that makes parallel
programming easier. Hardware implementations of transactional memory (HTM) suffer from …
programming easier. Hardware implementations of transactional memory (HTM) suffer from …