Multi-gate soi mosfets

JP Colinge - Microelectronic Engineering, 2007 - Elsevier
This paper describes the evolution of the SOI MOSFET from single-gate structures to
multigate (double-gate, trigate, Π-gate, Ω-gate and gate-all-around) structures. Increasing …

[HTML][HTML] Analytical study of dual material surrounding gate MOSFET to suppress short-channel effects (SCEs)

A Pal, A Sarkar - Engineering Science and Technology, an International …, 2014 - Elsevier
In this paper, a 2D analytical model for the Dual Material Surrounding Gate MOSFET
(DMSG) by solving the Poisson equation has been proposed and verified using ATLAS …

[PDF][PDF] The new generation of SOI MOSFETs

JP Colinge - Rom. J. Inf. Sci. Technol, 2008 - romjist.ro
The classical MOSFET is reaching its scaling limits and “endof-roadmap” alternative devices
are being investigated. Amongst the different types of SOI devices proposed, one clearly …

Mobility extraction in SOI MOSFETs with sub 1 nm body thickness

M Schmidt, MC Lemme, HDB Gottlob, F Driussi… - Solid-state …, 2009 - Elsevier
In this work we discuss limitations of the split-CV method when it is used for extracting carrier
mobilities in devices with thin silicon channels like FinFETs, ultra thin body silicon-on …

The SOI MOSFET: From single gate to multigate

JP Colinge - FinFETs and Other Multi-Gate Transistors, 2008 - Springer
General introduction of this Chapter shows the evolution of the SOI MOS transistor and
retraces the history of the multigate concept. The advantages of multigate FETs in terms of …

Performance assessment of nanoscale double-and triple-gate FinFETs

A Kranti, GA Armstrong - Semiconductor science and technology, 2006 - iopscience.iop.org
Based on 3D simulations, we report a performance assessment of triple-and double-gate
FinFETs for high performance (HP), low operating power (LOP) and low standby power …

[图书][B] Nanometer Cmos

F Schwierz, H Wong, JJ Liou - 2010 - books.google.com
This book presents the material necessary for understanding the physics, operation, design,
and performance of modern MOSFETs with nanometer dimensions. It offers a brief …

Subthreshold channels at the edges of nanoscale triple-gate silicon transistors

H Sellier, GP Lansbergen, J Caro, S Rogge… - Applied physics …, 2007 - pubs.aip.org
The authors investigate the subthreshold behavior of triple-gate silicon field-effect transistors
by low-temperature transport experiments. These three-dimensional nanoscale devices …

Recent trends and challenges on low-power finfet devices

PK Mukku, S Naidu, D Mokara, P Pydi Reddy… - … : Proceedings of the …, 2019 - Springer
Due to the rapid growth in electronic industries, the revolution on integrated circuits still
plays a major role. Over the past few decades, research works on integrated circuits are …

From gate-all-around to nanowire MOSFETs

JP Colinge - 2007 international semiconductor conference, 2007 - ieeexplore.ieee.org
The classical MOSFET is reaching its scaling limits and" end-of-roadmap" alternative
devices are being investigated. Amongst the different types of SOI devices proposed, one …