Controller, storage device, and method for power throttling memory operations

PA Lassa, RD Selinger - US Patent 8,694,719, 2014 - Google Patents
BACKGROUND A solid state drive (SSD) is designed to provide reliable and high
performance storage of user data across a flash-based memory system containing a host …

Bus arbitration techniques to reduce access latency

F Wang - US Patent 8,539,129, 2013 - Google Patents
BACKGROUND System architectures with shared memory structures are well known in the
art. A shared or global memory space may be accessed by multiple processors or …

Method and memory system for managing power based on semaphores and timers

DP Yurzola, R Nagabhirava, GJ Lin… - US Patent …, 2014 - Google Patents
Disclosed are apparatus and techniques for managing power in a memory system having a
controller and nonvolatile memory array. In one embodiment, prior to execution of each …

Memory system and method of controlling memory system

M Matsuyama, Y Kojima - US Patent App. 14/479,508, 2015 - Google Patents
BACKGROUND 0003. A memory system such as an SSD (Solid State Drive) which uses a
NAND-type flash memory in a storage medium has a throttling function for drive not with the …

Storage device and controllers included in storage device

JW Kim, NW Kang - US Patent 11,061,580, 2021 - Google Patents
A storage device includes a plurality of flash memories, a first local controller connected to a
first group of flash memories among the plurality of flash memories, a second local controller …

Power-aware memory controller circuitry

S Hedinger, P Clarke - US Patent 9,477,586, 2016 - Google Patents
Memory controller circuitry may process the memory access requests by reordering the
sequence of requests. Reordering the sequence of requests may decrease the power …

Vehicle illumination assembly

AB Johnson, SC Salter, PK Dellock, SK Helwig… - US Patent …, 2019 - Google Patents
An illumination assembly is provided herein. The illumination assembly includes a first light
source configured to generate an illumination pattern. A second light source is configured to …

Apparatus, system, and method for a fast data return memory controller

SJ Treichler, BW Simeral, R Surgutchick… - US Patent …, 2011 - Google Patents
A system controller includes a memory controller and a host interface residing in different
clock domains. There is a time delay between the time when the memory controller issues a …

Methods of bus arbitration for low power memory access

F Wang - US Patent 9,842,068, 2017 - Google Patents
Abstract Systems and method for arbitrating requests to a shared memory system for
reducing power consumption of memory accesses, comprises determining power modes …

Memory reorder queue biasing preceding high latency operations

MA Brittain, JS Dodson, SJ Powell, EE Retter… - US Patent …, 2014 - Google Patents
G06F 12/00(2006.01)(57) ABSTRACT G06F I3/00(2006.01) A memory system and data
processing system for controlling G06F 3/28(2006.01) memory refresh operations in …