CMOS miniaturization is now approaching the sub-10 nm level, and further downscaling is
expected. This size scaling will end sooner or later, however, because the typical size is …

The current status of High K dielectrics in Very Large Scale Integrated circuit (VLSI)
manufacturing for leading edge Dynamic Random Access Memory (DRAM) and …

A study into the optimal deposition temperature for ultra-thin La 2 O 3/Ge and Y 2 O 3/Ge
gate stacks has been conducted in this paper with the aim to tailor the interfacial layer for …

Thermal oxidation kinetics of Ge was investigated by the 18 O tracing study and re-oxidation
experiments of the SiO 2/GeO 2 stacked oxide-layer. The results suggest that Ge oxidation …

Germanium layers are very attractive for future semiconductor devices due to their high
carrier mobility. To form pn-junctions in such devices, ion implantation followed by an …

Gate oxide process is one of the most important issues for making high performance SiC
power MOSFETs. Previously, it has been demonstrated that plasma oxidation provides a …

This study explores the growth and structural characteristics of N d 2 O 3 layers on virtual
germanium-rich SiGe substrates on Si (111). We focus on the emergence of the hexagonal …

Thermal oxidation of a Ge (100) surface was investigated by using spectroscopic
ellipsometry (SE) and x-ray photoelectron spectroscopy (XPS). Ge oxide was grown in the …

This work presents specific exploration on the novel gate stack strategies for the intriguing
Ge p-MOSFET, where high pressure oxidation (HPO) process is utilized for sufficient …

The electrical properties of an Al2O3/Ge gate stack structure were improved by O2-
annealing. The interface state density can be decreased by O2-annealing without the …