Artificial neural networks for space and safety-critical applications: Reliability issues and potential solutions

P Rech - IEEE Transactions on Nuclear Science, 2024 - ieeexplore.ieee.org
Machine learning is among the greatest advancements in computer science and
engineering and is today used to classify or detect objects, a key feature in autonomous …

Revealing gpus vulnerabilities by combining register-transfer and software-level fault injection

FF dos Santos, JER Condia, L Carro… - 2021 51st Annual …, 2021 - ieeexplore.ieee.org
The complexity of both hardware and software makes GPUs reliability evaluation extremely
challenging. A low level fault injection on a GPU model, despite being accurate, would take …

Towards fault simulation at mixed register-transfer/gate-level models

E Kaja, N Gerlin, M Vaddeboina, L Rivas… - … on Defect and Fault …, 2021 - ieeexplore.ieee.org
Safety-critical designs used in automotive applications need to ensure reliable operations
even under hostile operating conditions. As these designs grow in size and complexity, they …

Fault-effect analysis on system-level hardware modeling using virtual prototypes

BA Tabacaru, M Chaari, W Ecker… - 2016 Forum on …, 2016 - ieeexplore.ieee.org
Safety-critical systems-on-chip currently undergo extensive fault-effect analyses. To meet the
safety requirements of ISO 26262, most frequently fault-injection campaigns are per-formed …

Multi-level timing simulation on GPUs

E Schneider, MA Kochte… - 2018 23rd Asia and …, 2018 - ieeexplore.ieee.org
Timing-accurate simulation of circuits is an important task in design validation of modern
nano-scale CMOS circuits. With shrinking technology nodes, detailed simulation models …

Metfi: Model-driven fault simulation framework

E Kaja, N Gerlin, L Rivas, M Bora… - arXiv preprint arXiv …, 2022 - arxiv.org
Safety-critical designs need to ensure reliable operations under hostile conditions with a
certain degree of confidence. The continuously higher complexity of these designs makes …

Multi-level timing and fault simulation on GPUs

E Schneider, HJ Wunderlich - Integration, 2019 - Elsevier
In CMOS technology first-order parametric faults during manufacturing can exhibit severe
changes in the timing as well as in the functional behavior of cells. Since these faults are …

Gate-Level-Accurate Fault-Effect Analysis at Virtual-Prototype Speed

BA Tabacaru, M Chaari, W Ecker, T Kruse… - … Safety, Reliability, and …, 2016 - Springer
The cost of efficient fault-effect analysis on gate-level (GL) and register-transfer level models
is increasing due to the rising complexity of safety-critical systems on chip (SoCs). Virtual …

Analyzing dependability measures at the Electronic System Level

M Michael, D Große, R Drechsler - FDL 2011 Proceedings, 2011 - ieeexplore.ieee.org
Raising the level of abstraction to design the next generation of embedded systems has
become mandatory. This design methodology is commonly referred to Electronic System …

Multi-Domain fault simulation using virtual Prototypes

R Koppak - 2022 - tobias-lib.ub.uni-tuebingen.de
Industrial electronic systems that control manufacturing and machine motion in modern,
highly automated production facilities have become highly complex, which combine a …