Cellular network service providers compete with each other for the vast and dynamic market
that is characterized by the ever-changing services on offer and technology. These services …

Popular generic fault models, which exhibit limited realism for different IC technologies, have
been widely misused due to their simplicity and cost-effective implementation. This paper …

A technique is described for the automatic insertion of fault models into VHDL gate models,
using shared variables and linked lists. This procedure does not require any modification to …

Autonomous robots are being used increasingly in safety-critical environments. Due to their
dynamic nature and uncertainty, failures of low-level actions are common. In plan-based …

A statistical dynamic timing analysis framework is presented to study the impact of
catastrophic defects and process variation on the delay behavior of a digital circuit …

Elektronische Systeme sind in vielen Bereichen des täglichen Lebens zur
Selbstverständlichkeit geworden. Dabei werden diese zunehmend komplexer und …

This paper presents a VHDL-based simulated fault injection (SFI) methodology for quantum
circuits. The main objective is to attain a high error modeling capability at a technology …

On-line testing increases hardware reliability, which is essential in safety-critical
applications, particularly in hostile operating conditions. High-level synthesis, on the other …

This dissertation reports on a new methodology to characterize and simulate a standard cell
library to be used for statistical static timing analysis. A compact variation-aware timing …