[图书][B] CMOS SRAM circuit design and parametric test in nano-scaled technologies: process-aware SRAM design and test
As technology scales into nano-meter region, design and test of Static Random Access
Memories (SRAMs) becomes a highly complex task. Process disturbances and various …
Memories (SRAMs) becomes a highly complex task. Process disturbances and various …
Intrinsic leakage in low power deep submicron CMOS ICs
A Keshavarzi, K Roy… - … Test Conference 1997, 1997 - ieeexplore.ieee.org
The large leakage currents in deep submicron transistors threaten future products and
established quality manufacturing techniques. These include the ability to manufacture low …
established quality manufacturing techniques. These include the ability to manufacture low …
Iddq testing for CMOS VLSI
R Rajsuman - Proceedings of the IEEE, 2000 - ieeexplore.ieee.org
It is little more than 15-years since the idea of Iddq testing was first proposed. Many
semiconductor companies now consider Iddq testing as an integral part of the overall testing …
semiconductor companies now consider Iddq testing as an integral part of the overall testing …
Intrinsic leakage in deep submicron CMOS ICs-measurement-based test solutions
A Keshavarzi, K Roy… - IEEE Transactions on Very …, 2000 - ieeexplore.ieee.org
The high leakage current in deep submicron, short-channel transistors can increase the
stand-by power dissipation of future IC products and threaten well established quiescent …
stand-by power dissipation of future IC products and threaten well established quiescent …
[PDF][PDF] Test challenges for deep sub-micron technologies
The use of deep submicron process technologies presents several new challenges in the
area of manufacturing test. While a significant body of work has been devoted to identifying …
area of manufacturing test. While a significant body of work has been devoted to identifying …
Microfluidic MEMS for semiconductor processing
AK Henning, JS Fitch, JM Harris… - … Technology: Part B, 1998 - ieeexplore.ieee.org
The advent of MEMS (microelectromechanical systems) will enable dramatic changes in
semiconductor processing. MEMS-based devices offer opportunities to achieve higher …
semiconductor processing. MEMS-based devices offer opportunities to achieve higher …
Defect detection with transient current testing and its potential for deep sub-micron CMOS ICs
M Sachdev, P Janssen, V Zieren - … Test Conference 1998 (IEEE …, 1998 - ieeexplore.ieee.org
Transient current testing (I/sub DDT/) has been often cited as an alternative and/or
supplement to I/sub DDQ/testing. In this article we investigate the potential of transient …
supplement to I/sub DDQ/testing. In this article we investigate the potential of transient …
Multiple-parameter CMOS IC testing with increased sensitivity for i/sub ddq
A Keshavarzi, K Roy, CF Hawkins… - IEEE transactions on very …, 2003 - ieeexplore.ieee.org
Technology scaling challenges the effectiveness of current-based test techniques such as
I/sub DDQ/. Furthermore, existing leakage reduction techniques are not as effective in …
I/sub DDQ/. Furthermore, existing leakage reduction techniques are not as effective in …
Impact of technology scaling on thermal behavior of leakage current in sub-quarter micron MOSFETs: perspective of low temperature current testing
O Semenov, A Vassighi, M Sachdev - Microelectronics Journal, 2002 - Elsevier
The increase in the off-state current for sub-quarter micron CMOS technologies is making
conventional IDDQ testing ineffective. Since natural process variation together with low-VTH …
conventional IDDQ testing ineffective. Since natural process variation together with low-VTH …
IDDX-based test methods: A survey
Supply current measurement-based test is a valuable defect-based test method for
semiconductor chips. Both static leakage current (IDDQ) and transient current (IDDT) based …
semiconductor chips. Both static leakage current (IDDQ) and transient current (IDDT) based …