An overview of critical applications of resistive random access memory

F Zahoor, A Nisar, UI Bature, H Abbas, F Bashir… - Nanoscale …, 2024 - pubs.rsc.org
The rapid advancement of new technologies has resulted in a surge of data, while
conventional computers are nearing their computational limits. The prevalent von Neumann …

A high-performance gate engineered InGaN dopingless tunnel FET

X Duan, J Zhang, S Wang, Y Li, S Xu… - IEEE Transactions on …, 2018 - ieeexplore.ieee.org
A gate engineered InGaN dopingless tunnel FET (DL-TFET) using the charge plasma
concept is proposed and investigated by silvaco Atlas simulation. In 0.75 Ga 0.25 N is a …

Analysis of a novel metal implant junctionless tunnel FET for better DC and analog/RF electrostatic parameters

S Tirkey, D Sharma, DS Yadav… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
Steep rise in the subthreshold slope, high current driving capability, and negligible
ambipolarity are the major prerequisite conditions of tunnel FETs (TFETs) to make it …

A high-performance source engineered charge plasma-based Schottky MOSFET on SOI

F Bashir, SA Loan, M Rafat… - … on Electron Devices, 2015 - ieeexplore.ieee.org
In this paper, we address an important issue of low ON current in a Schottky barrier (SB)
MOSFET by proposing a novel structure of Schottky MOSFET on silicon on insulator. The …

Gate engineered heterostructure junctionless TFET with Gaussian doping profile for ambipolar suppression and electrical performance improvement

H Aghandeh, SAS Ziabari - Superlattices and Microstructures, 2017 - Elsevier
This study investigates a junctionless tunnel field-effect transistor with a dual material gate
and a heterostructure channel/source interface (DMG-H-JLTFET). We find that using the …

Dielectrically modulated III-V compound semiconductor based pocket doped tunnel FET for label free biosensing applications

S Rashid, F Bashir, FA Khanday… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
In this paper, a novel structure of double gate tunnel FET has been proposed and simulated
for biosensing applications. The device uses III-V compound semiconductors and an n+ …

An In0.53Ga0.47As/In0.52Al0.48As Heterojunction Dopingless Tunnel FET With a Heterogate Dielectric for High Performance

H Liu, LA Yang, Z Jin, Y Hao - IEEE Transactions on Electron …, 2019 - ieeexplore.ieee.org
In this paper, an In 0.53 Ga 0.47 As/In 0.52 Al 0.48 As heterojunction dopingless tunnel field-
effect transistor (HDL-TFET) with an HfO 2/SiO 2 heterogate dielectric is proposed, where …

2-D design of double gate Schottky tunnel MOSFET for high-performance use in analog/RF applications

S Rashid, F Bashir, FA Khanday, MR Beigh… - IEEE …, 2021 - ieeexplore.ieee.org
In this work, a new structure of Schottky tunneling MOSFET has been designed and
simulated. The proposed device structure uses floating gates and dual material main gates …

Electrostatically doped DSL Schottky barrier MOSFET on SOI for low power applications

F Bashir, AG Alharbi, SA Loan - IEEE Journal of the Electron …, 2017 - ieeexplore.ieee.org
In this paper, we propose and simulate a novel Schottky barrier MOSFET (SB-MOSFET) with
improved performance in comparison to the conventional SB-MOSFET. The proposed …

Band Gap and Drain Dielectric Pocket Engineered Si0.2Ge0.8/GaAs Junctionless TFET with Dual Dielectric Gate for Ambipolar Suppression and Electrical …

K Kumar, SC Sharma - Silicon, 2023 - Springer
In this paper, a dual dielectric drain—dual dielectric gate hetero-structure Si0. 2Ge0. 8/GaAs
charge plasma-based junctionless TFET (DDD-DDG-HJLTFET) is proposed and analyzed …