Current-induced magnetization switching in atom-thick tungsten engineered perpendicular magnetic tunnel junctions with large tunnel magnetoresistance

M Wang, W Cai, K Cao, J Zhou, J Wrona… - Nature …, 2018 - nature.com
Perpendicular magnetic tunnel junctions based on MgO/CoFeB structures are of particular
interest for magnetic random-access memories because of their excellent thermal stability …

Magnetoresistive random access memory: Present and future

S Ikegawa, FB Mancoff, J Janesky… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
Magnetoresistive random access memory (MRAM) is regarded as a reliable persistent
memory technology because of its long data retention and robust endurance. Initial MRAM …

Failure analysis in magnetic tunnel junction nanopillar with interfacial perpendicular magnetic anisotropy

W Zhao, X Zhao, B Zhang, K Cao, L Wang, W Kang… - Materials, 2016 - mdpi.com
Magnetic tunnel junction nanopillar with interfacial perpendicular magnetic anisotropy (PMA-
MTJ) becomes a promising candidate to build up spin transfer torque magnetic random …

Performance-based comparative study of existing and emerging non-volatile memories: a review

P Jangra, M Duhan - Journal of Optics, 2023 - Springer
The need for high-density, higher-speed memory devices has increased tremendously over
the last decade. With scaling and integration capacity of traditional memories reaching its …

4Gbit density STT-MRAM using perpendicular MTJ realized with compact cell structure

SW Chung, T Kishi, JW Park… - 2016 IEEE …, 2016 - ieeexplore.ieee.org
For the first time, 4Gbit density STT-MRAM using perpendicular MTJ in compact cell was
successfully demonstrated through the tight distributions for resistance and magnetic …

SoC logic compatible multi-bit FeMFET weight cell for neuromorphic applications

K Ni, JA Smith, B Grisafe, T Rakshit… - 2018 IEEE …, 2018 - ieeexplore.ieee.org
We demonstrate an SoC logic compatible ferroelectric-metal field effect transistor (FeMFET)
digital 2-bit weight cell by monolithic BEOL integration of a ferroelectric (FE) capacitor with …

Low-barrier magnet design for efficient hardware binary stochastic neurons

O Hassan, R Faria, KY Camsari, JZ Sun… - IEEE Magnetics …, 2019 - ieeexplore.ieee.org
Binary stochastic neurons (BSNs) form an integral part of many machine learning
algorithms, motivating the development of hardware accelerators for this complex function. It …

A study on practically unlimited endurance of STT-MRAM

JJ Kan, C Park, C Ching, J Ahn, Y Xie… - … on Electron Devices, 2017 - ieeexplore.ieee.org
Magnetic tunnel junctions integrated for spin-transfer torque magnetoresistive random-
access memory are by far the only known solid-state memory element that can realize a …

On-chip memory technology design space explorations for mobile deep neural network accelerators

H Li, M Bhargava, PN Whatmough… - Proceedings of the 56th …, 2019 - dl.acm.org
Deep neural network (DNN) inference tasks have become ubiquitous workloads on mobile
SoCs and demand energy-efficient hardware accelerators. Mobile DNN accelerators are …

RHS-TRNG: A resilient high-speed true random number generator based on STT-MTJ device

S Fu, T Li, C Zhang, H Li, S Ma, J Zhang… - … Transactions on Very …, 2023 - ieeexplore.ieee.org
High-quality random numbers are very critical to many fields such as cryptography, finance,
and scientific simulation, which calls for the design of reliable true random number …