Artificial neural network based test escape screening using generative model

M Shintani, M Inoue, Y Nakamura - 2018 IEEE International …, 2018 - ieeexplore.ieee.org
In test of large scale integration (LSI) circuit, test escape is always regarded as a critical
issue since significant cost is imposed to manufacturing cost. In this paper, we propose a …

An artificial neural network approach for screening test escapes

F Lin, KT Cheng - 2017 22nd Asia and South Pacific Design …, 2017 - ieeexplore.ieee.org
In this paper we investigate the application of an artificial neural network (ANN) for
screening test escapes. Specifically, we propose to train an autoencoder, an ANN, in an …

Improving Efficiency and Robustness of Gaussian Process Based Outlier Detection via Ensemble Learning

M Eiki, T Nakamura, M Kajiyama… - 2023 IEEE …, 2023 - ieeexplore.ieee.org
Although automotive semiconductors must comply with the standard dynamic part average
testing (DPAT) defined by the Automotive Electronics Council, it remains challenging to …

Feasibility Study of Incremental Neural Network Based Test Escape Detection by Introducing Transfer Learning Technique

A Takaya, M Shintani - … Test Conference in Asia (ITC-Asia), 2023 - ieeexplore.ieee.org
Machine-learning-based test escape detection is gaining attention as a novel approach for
detecting faulty large-scale integrated circuits (LSIs) that traditional methods fail to detect. In …

[图书][B] Test data analytics: Exploration of hidden patterns for test cost reduction and silicon characterization

CK Hsu - 2016 - search.proquest.com
The manufacturing test process for a modern integrated circuit encounters excessively long
test time and produces huge amount of test data. There is valuable information hidden in the …