High efficiency digital transmitter incorporating switching power supply and linear power amplifier

OE Eliezer, G Feygin, J Mehta - US Patent App. 12/147,477, 2009 - Google Patents
A novel apparatus and method of improving the power efficiency of a digital transmitter for
non-constant-amplitude modulation schemes. The power efficiency improvement …

Linearization of a transmit amplifier

K Waheed, RB Staszewski, SS Rezeq… - US Patent …, 2012 - Google Patents
(57) ABSTRACT A novel apparatus and method of linearization of a digitally controlled pre-
power amplifier (DPA) and RF power ampli fier (PA). The mechanism is operative to perform …

Digital phase locked loop with integer channel mitigation

RB Staszewski, SK Vemulapalli, JL Wallberg… - US Patent …, 2011 - Google Patents
CKV (fy) operative to select one of the plurality of phases. A phase detection circuit is
coupled to the switch and is operable to receive a selected phase and to provide digital …

Computation spreading utilizing dithering for spur reduction in a digital phase lock loop

F Shi, R Staszewski, RB Staszewski - US Patent 8,134,411, 2012 - Google Patents
(57) ABSTRACT A novel and useful apparatus for and method of spur reduc tion using
computation spreading with dithering in a digital phase locked loop (DPLL) architecture. A …

Simultaneous multiple signal reception and transmission using frequency multiplexing and shared processing

RB Staszewski, K Muhammad, D Leipold - US Patent 8,542,616, 2013 - Google Patents
A novel mechanism for simultaneous multiple signal reception and transmission using
frequency multiplexing and shared processing. Multiple RF signals, which may be of various …

Predistortion calibration and built in self testing of a radio frequency power amplifier using subharmonic mixing

I Bashir, RB Staszewski, OE Eliezer - US Patent 8,463,189, 2013 - Google Patents
A novel and useful apparatus for and method of predistortion calibration and built-in self
testing (BIST) of a nonlinear digitally-controlled radio frequency (RF) power amplifier (DPA) …

Software reconfigurable digital phase lock loop architecture

R Staszewski, RB Staszewski, F Shi - US Patent 8,321,489, 2012 - Google Patents
(*) Notice: Subject to any disclaimer, the term of this 2006 0133559 Al* 6/2006
Glass............................ 375,376 patent is extended or adjusted under 35* cited by examiner …

Digital phase locked loop with dithering

K Waheed, M Sheba, RB Staszewski… - US Patent …, 2010 - Google Patents
An embodiment of the present invention provides a phase locked loop that operates on
clock signals derived from an RF clock signal generated by the phase locked loop. A …

Adaptive spectral noise shaping to improve time to digital converter quantization resolution using dithering

MM Sheba, RB Staszewski, K Waheed - US Patent 7,570,182, 2009 - Google Patents
A novel and useful apparatus for and method of improving the quantization resolution of a
time to digital converter in a digital PLL using noise shaping. The TDC quantization noise …

Linearization and calibration predistortion of a digitally controlled power amplifier

K Waheed, RB Staszewski, SS Rezeq… - US Patent …, 2015 - Google Patents
An apparatus and method of linearization of a digitally-con trolled pre-power amplifier (DPA)
and RF power amplifier (PA) for performing predistortion calibration to compensate for …