New design for error-resilient approximate multipliers used in image processing in CNTFET technology
SS Farahani, MR Reshadinezhad… - The Journal of …, 2024 - Springer
Approximate computing is a new approach to reducing power consumption and complexity,
increasing performance, and can generate a trade-off between accuracy and power-delay …
increasing performance, and can generate a trade-off between accuracy and power-delay …
Design of a high performance CNTFET-based full adder cell applicable in: Carry ripple, carry select and carry skip adders
HT Tari, AD Zarandi, MR Reshadinezhad - Microelectronic Engineering, 2019 - Elsevier
Abstract Carbon Nanotube Field Effect Transistor (CNTFET) s are applied instead of silicon
transistors to conquer the constraint of MOSFETs in nano-scale, with improving the power …
transistors to conquer the constraint of MOSFETs in nano-scale, with improving the power …
A new twelve-transistor approximate 4: 2 compressor in CNTFET technology
S Shirinabadi Farahani… - International Journal of …, 2019 - Taylor & Francis
Power consumption is a serious concern in the field of digital design. Reducing power
supply voltage, power gating, transistor downscaling, voltage over scaling, applying modern …
supply voltage, power gating, transistor downscaling, voltage over scaling, applying modern …
Design, analysis, and implementation of partial product reduction phase by using wide m: 3 (4≤ m≤ 10) compressors
S Mehrabi, RF Mirzaee… - … Journal of High …, 2013 - inderscienceonline.com
Compressors play an important role for partial products reduction in the multiplication
process. This paper presents a new implementation for the second phase of a 16× 16-bit …
process. This paper presents a new implementation for the second phase of a 16× 16-bit …
[PDF][PDF] A novel 4× 4 universal reversible gate as a cost efficient full adder/subtractor in terms of reversible and quantum metrics
S Moghimi, MR Reshadinezhad - IJMECS, 2015 - academia.edu
This paper proposes a new 4× 4 reversible logic gate which is named as MOG. Reversible
gates are logical basic units, having equal number of input and output lines, which can …
gates are logical basic units, having equal number of input and output lines, which can …
[PDF][PDF] Design and implementation of a three-operand multiplier through carbon nanotube technology
MR Reshadinezhad, N Charmchi… - International Journal of …, 2015 - academia.edu
Multiplication scheme is one of the most essential factors, which is time consuming.
Designers and manufacturers of processors emphasis on methods which would not only …
Designers and manufacturers of processors emphasis on methods which would not only …
Design of a parity preserving reversible full adder/subtractor circuit
SR Arabani, MR Reshadinezhad… - International Journal …, 2018 - inderscienceonline.com
The reversible logical circuits, due to their economised power consumption in comparison
with their counterparts with binary circuits, have become a major issue of study. A reversible …
with their counterparts with binary circuits, have become a major issue of study. A reversible …
Design and implementation of array multiplier using compressor for low power
Multiplication is an imperative part of Image Processing, and Digital Signal Processing
(DSP) applications. The high speed is required in processing that is achieved by using …
(DSP) applications. The high speed is required in processing that is achieved by using …
[PDF][PDF] A Novel High-speed Two-operand Multiplier using CNFET Technology
N Charmchi, M Reshadinezhad - International Journal of Advanced …, 2015 - ijaist.com
Multiplication is a crucial process in digital arithmetic, due to its application in multi-
dimensional graphics, FIR filters, cryptography, etc. Researchers focus on reducing the …
dimensional graphics, FIR filters, cryptography, etc. Researchers focus on reducing the …
[引用][C] An Energy Efficient Four-operand Multiplier Architecture using CNTFET Technology
MR Reshadinezhad, N Charmchi, M Masood