Correlation between two time-dependent dielectric breakdown measurements for the gate oxides damaged by plasma processing

K Eriguchi, Y Kosaka - IEEE Transactions on Electron Devices, 1998 - ieeexplore.ieee.org
The relationship between two time-dependent dielectric breakdown (TDDB), the charge-to-
breakdown under constant-current injection (Q/sub bd/), and the time-to-breakdown under …

Modeling of oxide breakdown from gate charging during resist ashing

S Fang, S Murakawa, JP McVittie - IEEE Transactions on …, 1994 - ieeexplore.ieee.org
Plasma damage was observed after exposing an antenna capacitor structure to an O/sub
2/plasma in a single wafer resist asher. The observed early breakdown is well modeled by …

Nitrogen Plasma Processing of SiO2/4H-SiC Interfaces

A Modic, YK Sharma, Y Xu, G Liu, AC Ahyi… - Journal of electronic …, 2014 - Springer
A nitrogen plasma annealing process for gate dielectric applications in 4H-SiC metal oxide
semiconductor (MOS) technology has been investigated. This process results in …

Plasma charging damage on ultrathin gate oxides

D Park, C Hu - IEEE electron device letters, 1998 - ieeexplore.ieee.org
Capacitor CV and threshold voltage and subthreshold swing of MOSFET's with gate oxide
thickness varying from 2.2 to 7.7 nm are analyzed to study the plasma charging damage by …

MuGFET carrier mobility and velocity: Impacts of fin aspect ratio, orientation and stress

N Xu, X Sun, W Xiong, CR Cleavelin… - 2010 International …, 2010 - ieeexplore.ieee.org
A detailed study of the impacts of fin aspect ratio and crystalline orientation and process-
induced channel stress on the performance of multi-gate transistors is presented. It is found …

Numerical simulation method for plasma-induced damage profile in SiO2 etching

N Kuboi, T Tatsumi, S Kobayashi… - Japanese Journal of …, 2011 - iopscience.iop.org
We developed a numerical simulation method for the depth profiles of plasma-induced
physical damage to SiO 2 and Si layers during fluorocarbon plasma etching. In the proposed …

A new process for CMOS MEMS capacitive sensors with high sensitivity and thermal stability

SS Tan, CY Liu, LK Yeh, YH Chiu… - … of Micromechanics and …, 2011 - iopscience.iop.org
Abstract Structure curling induces thermal instability into CMOS MEMS capacitive sensors.
The charging effect during reactive ion etching damages the existing on-chip MOS …

Cmos on-chip stable true-random id generation using antenna effect

F Tang, DG Chen, B Wang, A Bermak… - IEEE electron device …, 2013 - ieeexplore.ieee.org
A CMOS on-chip ID generation scheme is proposed. Using the antenna effect during the
chip fabrication, one gate in a transistor pair is physically randomly broken down due to the …

Effect of plasma-induced charging damage on n-channel and p-channel MOSFET hot carrier reliability

RR Mistry, BJ Fishbein, BS Doyle - Proceedings of 1994 IEEE …, 1994 - ieeexplore.ieee.org
We have investigated the impact of plasma-induced charging damage on the hot carrier
reliability of n-and p-MOSFET's, including the examination of different stress bias regimes …

Evaluation of plasma damage using fully processed metal–oxide–semiconductor transistors

XY Li, T Brożek, F Preuninger, D Chan… - Journal of Vacuum …, 1996 - pubs.aip.org
The device damage during plasma etching is studied in this work using fully processed
metal–oxide–semiconductor (MOS) transistors with antennas to accentuate oxide charging …