Access characteristic guided read and write cost regulation for performance improvement on flash memory

Q Li, L Shi, CJ Xue, K Wu, C Ji, Q Zhuge… - … USENIX Conference on …, 2016 - usenix.org
The relatively high cost of write operations has become the performance bottleneck of flash
memory. Write cost refers to the time needed to program a flash page using incremental-step …

SSDKeeper: Self-adapting channel allocation to improve the performance of SSD devices

R Liu, X Chen, Y Tan, R Zhang… - 2020 IEEE …, 2020 - ieeexplore.ieee.org
Solid state drives (SSDs) have been widely deployed in high performance data center
environments, where multiple tenants usually share the same hardware. However …

Retention trimming for lifetime improvement of flash memory storage systems

L Shi, K Wu, M Zhao, CJ Xue, D Liu… - IEEE Transactions on …, 2015 - ieeexplore.ieee.org
NAND flash memory has been widely deployed in embedded systems, personal computers,
and data centers. While recent technology scaling and density improvement have reduced …

[PDF][PDF] Laldpc: Latency-aware ldpc for read performance improvement of solid state drives

Y Du, D Zou, Q Li, L Shi, H Jin, CJ Xue - Proc. MSST, 2017 - msstconference.org
High-density Solid State Drives (SSDs) have to use Low-Density Parity-Check (LDPC)
codes to store data reliably. Current LDPC implementations apply multiple read-retry steps …

Self-adapting channel allocation for multiple tenants sharing SSD devices

R Liu, D Liu, X Chen, Y Tan, R Zhang… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
Solid-state drives (SSDs) have been widely deployed in high-performance data center
environments, where multiple tenants usually share the same hardware. However …

Process Variation Aware Read Performance Improvement for LDPC-Based nand Flash Memory

Q Li, L Shi, Y Di, C Gao, C Ji, Y Liang… - IEEE Transactions on …, 2019 - ieeexplore.ieee.org
With the rapid development of technology scaling and cell density improvement for capacity
increase and cost reduction, nand flash memory is confronted with degraded reliability. On …

DLV: Exploiting device level latency variations for performance improvement on flash memory storage systems

J Cui, Y Zhang, W Wu, J Yang, Y Wang… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
NAND flash has been widely adopted in storage systems due to its better read and write
performance and lower power consumption over traditional mechanical hard drives. To meet …

Analysis and mitigation of patterned read collisions in flash SSDs

Y Jun, J Park, JU Kang, E Seo - IEEE Access, 2022 - ieeexplore.ieee.org
A modern flash solid-state drive (SSD) achieves superb throughput by accessing its flash
memory dies in parallel. To obtain parallelism in processing writes, the flash translation layer …

Exploiting latency variation for access conflict reduction of NAND flash memory

J Cui, W Wu, X Zhang, J Huang… - 2016 32nd Symposium …, 2016 - ieeexplore.ieee.org
NAND flash memory has been widely used in storage systems by offering greater read/write
performance and lower power consumption than mechanical hard drives. Recently, the …

Access characteristic guided read and write regulation on flash based storage systems

Q Li, L Shi, C Gao, Y Di, CJ Xue - IEEE Transactions on …, 2018 - ieeexplore.ieee.org
NAND flash memory is now used in various storage systems, such as embedded systems,
personal computers, and web servers. The developments in bit density and technology …