FIR filter realization via deferred end-around carry modular addition

A Belghadr, G Jaberipur - … on Circuits and Systems I: Regular …, 2018 - ieeexplore.ieee.org
Hardware realization of FIR filters that are based on residue number systems leads to
increased speed and reduced power, where besides the popular Mersenne numbers …

Unfairness correction in P2P grids based on residue number system of a special form

M Babenko, N Chervyakov, A Tchernykh… - … on Database and …, 2017 - ieeexplore.ieee.org
This paper addresses error correction codes approach in order to improve the performance
of BOINC under uncertainty of users' behavior. Redundant Residue Number System (RRNS) …

Balanced Adders for Moduli Set

G Jaberipur, B Nadimi - … Transactions on Circuits and Systems I …, 2020 - ieeexplore.ieee.org
Residue number systems (RNS) are characterized by fast modular arithmetic and low power
dissipation. Numerous RNS applications take advantage of moduli set τ={2 n-1, 2 n, 2 n+ 1} …

Adder-Only Reverse Converters for 5-Moduli Set {2q, 2q − 1, 2q+1 ± 1, 2q+2 − 1}

HR Ahmadifar, Z Torabi - IETE Journal of Research, 2024 - Taylor & Francis
We propose a balanced 5-moduli set P={2 q, 2 q− 1, 2 q+ 1− 1, 2 q+ 1+ 1, 2 q+ 2− 1}, for odd
q≥ 3. Our reverse conversion scheme is based on a multi-stage new Chinese remainder …

Efficient variable-coefficient RNS-FIR filters with no restriction on the moduli set

A Belghadr, G Jaberipur - Signal, Image and Video Processing, 2022 - Springer
Introduction of residue number systems (RNS) into hardware realization of high dynamic
range FIR filters is known to be advantageous. However, deciding on the number and forms …

Modulo-(2q − 3) Multiplication with Fully Modular Partial Product Generation and Reduction

G Jaberipur, S Gorgin, N Ahamadian… - 2023 IEEE 30th …, 2023 - ieeexplore.ieee.org
Given the residue number systems that contain moduli of the form 2 q±1 and 2 q±3, it is
desirable to employ delay-balanced adders and multipliers, in order to synchronize the …

Forward and Reverse Converters for the Moduli-Set

G Jaberipur, B Nadimi, R Kazemi, JA Lee - arXiv preprint arXiv …, 2024 - arxiv.org
Modulo-$(2^ q+ 2^{q-1}\pm 1) $ adders have recently been implemented using the regular
parallel prefix (RPP) architecture, matching the speed of the widely used modulo-$(2^ q\pm …

Compressed transitive delta encoding

D Shapira - 2009 Data Compression Conference, 2009 - ieeexplore.ieee.org
Given a source file S and two differencing files Delta (S, T) and Delta (T, R), where Delta (A,
Y) is used to denote the delta file of the target file Y with respect to the source file X, the …

Up to -bit Modular Montgomery Multiplication in Residue Number Systems With Fast 16-bit Residue Channels

Z Ahmadpour, G Jaberipur - IEEE Transactions on Computers, 2021 - ieeexplore.ieee.org
Hardware realization of public-key cryptosystems often entails Montgomery modular
multiplication (MMM), which is more efficient in residue number systems (RNS). A large pool …

Adder-Only Reverse Converters for 5-Moduli Set {2q, 2q-1, 2q+ 1-1, 2q+ 1+ 1, 2q+ 2-1}

HR Ahmadifar, G Jaberipur, Z Torabi - Available at SSRN 4431919 - papers.ssrn.com
We propose a balanced-moduli set P={2q, 2q-1, 2q+ 1-1, 2q+ 1+ 1, 2q+ 2-1}, for odd. Our
reverse conversion scheme is based on multi-stage new Chinese remainder theorem …