CMOS technology dominates the semiconductor industry, and the reliability of MOSFETs is a
key issue. To optimize chip design, trade-offs between reliability, speed, power …

Negative bias temperature instabilities (NBTI) received little attention pre-2000, but have
been intensively investigated post-2000, as they become limiting device lifetime. The …

Oxide semiconductor thin-film transistors (TFTs) are used in the pixel array and gate driver
circuits of organic light emitting diode (OLED) display panels. Long-term reliability …

To predict the negative bias temperature instability (NBTI) toward the end of pMOSFETs' ten
years lifetime, power-law-based extrapolation is the industrial standard method. The …

In this paper, a compact model for the negative bias temperature instability (NBTI) is
developed by considering the interface-state generation and the hole-trapping mechanisms …

Conducting negative bias temperature instability (NBTI) stress/recovery experiments on n-
type metal-oxide-semiconductor-field-effect-transistors (n-MOSFETs), we have been able to …

Positive charges (PCs) in gate dielectric shift the threshold voltage and cause a time-
dependent device variability. To assess their impact on circuits, it is useful to know their …

Positive bias temperature instability (PBTI) is poised to cause significant degradation to
nFETs with deep scaling into nanometers. It is commonly modeled by a power law fitted with …

Characterizing interface states is a key task, and it typically takes seconds when
conventional techniques, such as charge pumping (CP), are used. The stress-induced …

Variability of nanometer-size devices is a major challenge for circuit design. Apart from the
as-fabricated variability, the postfabrication degradation introduces a time-dependent …