Transistor with asymmetric source/drain overlap
An asymmetric field-effect transistor having different gate to-source and gate-to-drain
overlaps allows lower parasitic capacitance on the drain side of the device and lower …
overlaps allows lower parasitic capacitance on the drain side of the device and lower …
Transistor with asymmetric spacers
A field-effect transistor device including an asymmetric spacer assembly allows lower
parasitic capacitance on the drain side of the device and lower resistance on the source …
parasitic capacitance on the drain side of the device and lower resistance on the source …
Transistor with asymmetric spacers
(57) ABSTRACT A field-effect transistor device including an asymmetric spacer assembly
allows lower parasitic capacitance on the drain side of the device and lower resistance on …
allows lower parasitic capacitance on the drain side of the device and lower resistance on …
Field effect transistor including gradually varying composition channel
I Hwang, J Kim, J Kim, P Younghwan, J Park… - US Patent …, 2021 - Google Patents
Provided is a field effect transistor (FET) including a gradu ally varying composition channel.
The FET includes: a drain region; a drift region on the drain region; a channel region on the …
The FET includes: a drain region; a drift region on the drain region; a channel region on the …
Semiconductor device and manufacturing method thereof
P Ramvall, M Passlack, G Doornbos - US Patent 10,516,039, 2019 - Google Patents
(57) ABSTRACT A tunnel field-effect transistor (TFET), comprising a first source/drain layer
comprising a first polar sidewall; a second source/drain layer surrounding the first …
comprising a first polar sidewall; a second source/drain layer surrounding the first …
Steep sloped vertical tunnel field-effect transistor
P Ramvall, M Passlack - US Patent 12,107,126, 2024 - Google Patents
The current disclosure describes a vertical tunnel FET device including a vertical PIN
heterojunction structure of a P-doped nanowire gallium nitride source/drain, an intrinsic InN …
heterojunction structure of a P-doped nanowire gallium nitride source/drain, an intrinsic InN …
Field effect transistor including gradually varying composition channel
I Hwang, J Kim, J Kim, P Younghwan, J Park… - US Patent …, 2024 - Google Patents
H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or
switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier …
switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier …
Steep sloped vertical tunnel field-effect transistor
P Ramvall, M Passlack - US Patent 11,355,590, 2022 - Google Patents
The current disclosure describes a vertical tunnel FET device including a vertical PIN
heterojunction structure of a P-doped nanowire gallium nitride source/drain, an intrinsic InN …
heterojunction structure of a P-doped nanowire gallium nitride source/drain, an intrinsic InN …