Single-electron transistor: review in perspective of theory, modelling, design and fabrication

R Patel, Y Agrawal, R Parekh - Microsystem Technologies, 2021 - Springer
Integrated circuit (IC) technology has grown tremendously over the last few decades. The
prime goal has been to achieve low-power and high-performance in logic and memory …

Towards atomic and close-to-atomic scale manufacturing

F Fang, N Zhang, D Guo, K Ehmann… - … Journal of Extreme …, 2019 - iopscience.iop.org
Human beings have witnessed unprecedented developments since the 1760s using
precision tools and manufacturing methods that have led to ever-increasing precision, from …

Technology and modeling of nonclassical transistor devices

GV Angelov, DN Nikolov… - Journal of Electrical and …, 2019 - Wiley Online Library
This paper presents a comprehensive outlook for the current technology status and the
prospective upcoming advancements. VLSI scaling trends and technology advancements in …

Cryogenic preamplification of a single-electron-transistor using a silicon-germanium heterojunction-bipolar-transistor

MJ Curry, TD England, NC Bishop, G Ten-Eyck… - Applied Physics …, 2015 - pubs.aip.org
We examine a silicon-germanium heterojunction bipolar transistor (HBT) for cryogenic pre-
amplification of a single electron transistor (SET). The SET current modulates the base …

Realization of multiple valued logic and memory by hybrid SETMOS architecture

S Mahapatra, AM Ionescu - IEEE transactions on …, 2005 - ieeexplore.ieee.org
A novel complimentary metal-oxide-semiconductor (CMOS) single-electron transistor (SET)
hybrid architecture, named SETMOS, is proposed, which offers Coulomb blockade …

Exploring the influence of variability on single-electron transistors into SET-based circuits

E Amat, J Bausells… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
We analyze the performance of hybrid single-electron transistor (SET)-FET circuits when
different variability sources are considered, eg, SET's quantum dot location and FET device …

[图书][B] Fundamentals of nanoscaled field effect transistors

A Chaudhry - 2013 - Springer
This book is an outcome of my research publications during my teaching and research
career. The book is about basic understanding of the MOSFET devices and their physics at …

Compact analytical model for room-temperature-operating silicon single-electron transistors with discrete quantum energy levels

K Miyaji, M Saitoh, T Hiramoto - IEEE transactions on …, 2006 - ieeexplore.ieee.org
A compact and analytical model for silicon single-electron transistors (SETs) considering the
discrete quantum energy levels and the parabolic tunneling barriers is proposed. The model …

Simulation and design methodology for hybrid SET-CMOS integrated logic at 22-nm room-temperature operation

R Parekh, A Beaumont, J Beauvais… - IEEE transactions on …, 2012 - ieeexplore.ieee.org
Single-electron transistor (SET) circuits can be stacked above the CMOS platform to achieve
functional and heterogeneous 3-D integration of nanoelectronic devices. For SET-CMOS …

Influence of quantum dot characteristics on the performance of hybrid SET-FET circuits

E Amat, F Klüpfel, J Bausells… - IEEE Transactions on …, 2019 - ieeexplore.ieee.org
Quantum dots (QDs) can be used as conductive islands to build-up single-electron
transistors (SETs). The characteristics of the QDs define the functional performance of the …