As the number of cores on a chip increases and key applications become even more data-
intensive, memory systems in modern processors have to deal with increasingly large …

Approximate computing has gained research attention recently as a way to increase energy
efficiency and/or performance by exploiting some applications' intrinsic error resiliency …

Cache compression is a promising technique to increase on-chip cache capacity and to
decrease on-chip and off-chip bandwidth usage. Unfortunately, directly applying well-known …

Performance and power consumption of an on-chip interconnect that forms the backbone of
chip multiprocessors (CMPs), are directly influenced by the underlying network topology …

The trend of unsustainable power consumption and large memory bandwidth demands in
massively parallel multicore systems, with the advent of the big data era, has brought upon …

Dynamic Random Access Memory (DRAM) has been used in main memory design for
decades. However, DRAM consumes an increasing power budget and faces difficulties in …

In multicore processor systems, last-level caches (LLCs) play a crucial role in reducing
system energy by i) filtering out expensive accesses to main memory and ii) reducing the …

Data compression can be an effective method to achieve higher system performance and
energy efficiency in modern data-intensive applications by exploiting redundancy and data …

Performance and power are the first order design metrics for Network-on-Chips (NoCs) that
have become the de-facto standard in providing scalable communication backbones for …

Routing algorithms for networks-on-chip (NoCs) typically only have a small number of virtual
channels (VCs) at their disposal. Limited VCs pose several challenges to the design of fully …