Interconnect scaling has become a major design challenge for traditional planar (2D)
integrated circuits (ICs). Three-dimensional (3D) IC that stacks multiple device layers …

Current computing platforms encourage the integration of thousands of processing cores,
and their interconnections, into a single chip. Mobile smartphones, IoT, embedded devices …

Although traffic deadlock at an intersection is a common phenomenon during rush hours, the
deadlock formation metrics such as formation probability and duration have not been …

As number of components on the semi-conductor industry is growing at a healthy rate,
results in an increase in number of cores integrating on a chip.. Demand for core …

Deadlock is an extreme traffic flow operational state during rush hours. Many literatures
have studied autonomous vehicle coordination under the umbrella of deadlock‐free …

According to a research there are about 6 million populations in the world who are
paralysed and needs a wheelchair for their mobility. Earlier the wheel chairs had to be …

Network-on-chip (NoC) paradigm, which is based on a modular packet-switched
mechanism, effectively addresses many of the on-chip communication challenges such as …

In this paper, an efficient approach for dynamic congestion management and traffic control of
reconfigurable network-on-chip (NoC) is proposed. In this approach that called DyCM, the …

Network-on-Chip (NoC) has become the de facto communication standard for multi-core or
many-core System-on-Chip (SoC) due to its scalability and flexibility. However, an important …

Microscopic traffic model serves as the foundation of traffic flow theory and is the basis for
applications such as traffic simulation, autonomous vehicle simulation, and digital twin …