Nanoionic memristive phenomena in metal oxides: the valence change mechanism
This review addresses resistive switching devices operating according to the bipolar
valence change mechanism (VCM), which has become a major trend in electronic materials …
valence change mechanism (VCM), which has become a major trend in electronic materials …
Resistive random access memory: a review of device challenges
With scaling, existing charge-based memory technologies exhibit limitations due to charge
leaking away easily in a smaller device. Therefore, non-charge based memory technologies …
leaking away easily in a smaller device. Therefore, non-charge based memory technologies …
Microscopic Modeling of HfOx RRAM Operations: From Forming to Switching
A Padovani, L Larcher, O Pirrotta… - … on electron devices, 2015 - ieeexplore.ieee.org
We propose a model describing the operations of hafnium oxide-based resistive random
access memory (RRAM) devices at the microscopic level. Charge carrier and ion transport …
access memory (RRAM) devices at the microscopic level. Charge carrier and ion transport …
Highly uniform resistive switching characteristics of Ti/TaOx/ITO memristor devices for neuromorphic system
In this study, we focused on the uniformity of resistance states of Ti/TaO x/ITO devices and
the possibility of using them in neuromorphic applications under DC and pulse …
the possibility of using them in neuromorphic applications under DC and pulse …
Direct measurement of nanoscale filamentary hot spots in resistive memory devices
Resistive random access memory (RRAM) is an important candidate for both digital, high-
density data storage and for analog, neuromorphic computing. RRAM operation relies on …
density data storage and for analog, neuromorphic computing. RRAM operation relies on …
ZnO and ZnO-based materials as active layer in resistive random-access memory (RRAM)
E Nowak, E Chłopocka, M Szybowicz - Crystals, 2023 - mdpi.com
In this paper, an overview of the influence of various modifications on ZnO-based RRAM has
been conducted. Firstly, the motivation for creating new memory technology is presented …
been conducted. Firstly, the motivation for creating new memory technology is presented …
Device-aware test: A new test approach towards DPPB level
This paper proposes a new test approach that goes beyond cell-aware test, ie, device-aware
test. The approach consists of three steps: defect modeling, fault modeling, and test/DfT …
test. The approach consists of three steps: defect modeling, fault modeling, and test/DfT …
Defects, fault modeling, and test development framework for RRAMs
Resistive RAM (RRAM) is a promising technology to replace traditional technologies such
as Flash, because of its low energy consumption, CMOS compatibility, and high density …
as Flash, because of its low energy consumption, CMOS compatibility, and high density …
Toward reliable multi-level operation in RRAM arrays: Improving post-algorithm stability and assessing endurance/data retention
E Perez, C Zambelli, MK Mahadevaiah… - IEEE Journal of the …, 2019 - ieeexplore.ieee.org
Achieving a reliable multi-level operation in resistive random access memory (RRAM) arrays
is currently a challenging task due to several threats like the post-algorithm instability …
is currently a challenging task due to several threats like the post-algorithm instability …
Multilevel cell storage and resistance variability in resistive random access memory
Multilevel per cell (MLC) storage in resistive random access memory (ReRAM) is attractive
in achieving high-density and low-cost memory and will be required in future. In this chapter …
in achieving high-density and low-cost memory and will be required in future. In this chapter …