A Perspective View of Silicon Based Classical to Non-Classical MOS Transistors and their Extension in Machine Learning

AP Singh, VK Mishra, S Akhter - Silicon, 2023 - Springer
Unprecedented growth in CMOS technology and demand of high-density integrated circuits
(ICs) in semiconductor industry has motivated to research community towards the …

Demonstration of a nanosheet FET with high thermal conductivity material as buried oxide: Mitigation of self-heating effect

S Rathore, RK Jaisawal, PN Kondekar… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
Self-heating-induced thermal degradation is a severe issue in nonplanar MOS architectures.
Especially in stacked gate-all-around (GAA) nanosheet FET (NSFET), the self-heating effect …

Common source amplifier and ring oscillator circuit performance optimization using multi-bridge channel FETs

VB Sreenivasulu, NA Kumari, V Lokesh… - ECS Journal of Solid …, 2023 - iopscience.iop.org
In this paper the DC, analog/RF device and circuit applications of nanosheet (NS) FET is
performed. To enhance power performance co-optimization geometry parameters like NS …

Investigation of Analog/RF and linearity performance with self-heating effect in nanosheet FET

S Rathore, RK Jaisawal, PN Kondekar, N Bagga - Microelectronics Journal, 2023 - Elsevier
In vertically stacked gate-all-around Nanosheet FET (NSFET), the channels/sheets are
wrapped by a low thermal conductivity material, which hinders the active heat flow path and …

Interface traps in the sub-3 nm technology node: A comprehensive analysis and benchmarking of negative capacitance FinFET and nanosheet FETs-A reliability …

S Valasa, VR Kotha, N Vadthiya - Microelectronics Reliability, 2024 - Elsevier
Interface traps play a significant role in shaping the performance and reliability of
semiconductor devices, particularly in advanced technologies such as Negative …

An analytical drain current modelling of DMGC CGAA FET: a circuit level implementation

PK Mudidhe, BR Nistala - Physica Scripta, 2023 - iopscience.iop.org
The GAA FET has emerged as a promising device due to its excellent control over short-
channel effects and improved electrostatic control. This manuscript presents the analytical …

Interaction of Negative Bias Instability and Self-Heating Effect on Threshold Voltage and SRAM (Static Random-Access Memory) Stability of Nanosheet Field-Effect …

X Li, Y Shao, Y Wang, F Liu, F Kuang, Y Zhuang, C Li - Micromachines, 2024 - mdpi.com
In this paper, we investigate the effects of negative bias instability (NBTI) and self-heating
effect (SHE) on threshold voltage in NSFETs. To explore accurately the interaction between …

Self-heating aware threshold voltage modulation conforming to process and ambient temperature variation for reliable nanosheet FET

S Rathore, RK Jaisawal, PN Kondekar… - 2023 IEEE …, 2023 - ieeexplore.ieee.org
Internal and external process variations severely affect the device threshold voltage (V_th)
and, in turn, the device's reliability. For the first time, this paper presented a thorough …

Analysis on the impact of interface Trap distributions on SOI DMG FinFETs: Overlap/underlap configurations

R Chaudhary, R Saha - Micro and Nanostructures, 2024 - Elsevier
This paper investigates the significance of interface trap charges (ITCs) distribution by
introducing localized charges (donor/acceptor) at the interface of semiconductor/insulator on …

Core-insulator embedded nanosheet field-effect transistor for suppressing device-to-device variations

D Son, H Lee, H Kim, JH Ahn, S Kim - Scientific Reports, 2024 - nature.com
Nanosheet field-effect transistors (NSFETs) have attracted considerable attention for their
potential to achieve improved performance and energy efficiency compared to traditional …