Low cost fault-tolerant routing algorithm for networks-on-chip
A novel adaptive routing algorithm–Efficient Dynamic Adaptive Routing (EDAR) is proposed
to provide a fault-tolerant capability for Networks-on-Chip (NoC) via an efficient routing path …
to provide a fault-tolerant capability for Networks-on-Chip (NoC) via an efficient routing path …
Evaluating the effectiveness of bat optimization in an adaptive and energy-efficient network-on-chip routing framework
Adaptive routing is effective in maintaining higher processor performance and avoids
packets over minimal or non-minimal alternate routes without congestion for a …
packets over minimal or non-minimal alternate routes without congestion for a …
SDNoC: Software defined network on a chip
We present a novel network-on-chip (NoC) architecture, called SDNoC, that is based on a
hybrid hardware/software approach. This approach is based on a few principles used in …
hybrid hardware/software approach. This approach is based on a few principles used in …
C-Routing: An adaptive hierarchical NoC routing methodology
MK Puthal, V Singh, MS Gaur… - 2011 IEEE/IFIP 19th …, 2011 - ieeexplore.ieee.org
Deterministic routing algorithms are easier to design and implement in NoC but these fail to
adapt to congestion. Table based adaptive routing solutions are not scalable. As the number …
adapt to congestion. Table based adaptive routing solutions are not scalable. As the number …
CFPA: Congestion aware, fault tolerant and process variation aware adaptive routing algorithm for asynchronous Networks-on-Chip
ST Muhammad, M Saad, AA El-Moursy… - Journal of Parallel and …, 2019 - Elsevier
Delays caused by congestion, faults and process variation (PV) degrade networks-on-chip
(NoC) performance. A congestion aware, fault tolerant and process variation aware adaptive …
(NoC) performance. A congestion aware, fault tolerant and process variation aware adaptive …
A general fault-tolerant minimal routing for mesh architectures
H Zhao, N Bagherzadeh, J Wu - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
Fault-tolerant minimal routing algorithms aim at finding a Manhattan path between the
source and destination nodes and route around all faulty nodes. Additionally, some non …
source and destination nodes and route around all faulty nodes. Additionally, some non …
Hamiltonian properties of honeycomb meshes
Meshes are widely used topologies for Networks on Chip (NoC). Honeycomb meshes have
better topological properties than Meshes. In order to communicate efficiently in a linear or …
better topological properties than Meshes. In order to communicate efficiently in a linear or …
Partially adaptive look-ahead routing for low latency network-on-chip
N Najib, A Monemi, MN Marsono - 2014 IEEE Student …, 2014 - ieeexplore.ieee.org
Adaptive routing algorithms offer the ability to avoid congestion by supporting multiple paths
between a source and destination. However, supporting adaptive routing for low latency …
between a source and destination. However, supporting adaptive routing for low latency …
Application of logical sub-networking in congestion-aware deadlock-free SDmesh routing
An adaptive routing helps in evading early network saturation by steering data packets
through the less congested area at the oppressive loaded situation. However, performances …
through the less congested area at the oppressive loaded situation. However, performances …
A path-counter method for fault-tolerant minimal routing algorithms in 2D mesh
H Zhao, Q Wang, K Xiong, S Pei - Journal of Circuits, Systems and …, 2018 - World Scientific
Fault-tolerant Manhattan routing algorithms aim at finding a Manhattan path between the
source and destination nodes and route around all faulty nodes. However, besides faulty …
source and destination nodes and route around all faulty nodes. However, besides faulty …