Transistor with threshold voltage set notch and method of fabrication thereof

R Arghavani, P Ranade, L Shifren… - US Patent …, 2014 - Google Patents
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Low power semiconductor transistor structure and method of fabrication thereof

L Shifren, P Ranade, SE Thompson… - US Patent …, 2013 - Google Patents
Deeply Depleted Channel (DDC) design, allowing CMOS based devices to have a reduced
OV, compared to conven tional bulk CMOS and can allow the threshold voltage V of FETs …

Advanced transistors with punch through suppression

L Shifren, P Ranade, PE Gregory… - US Patent …, 2013 - Google Patents
An advanced transistor with punch through suppression includes a gate with length Lg, a
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Bit interleaved low voltage static random access memory (SRAM) and related methods

LT Clark - US Patent 9,070,477, 2015 - Google Patents
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Dynamic random access memory (DRAM) with low variation transistor peripheral circuits

LT Clark, L Shifren, RS Roy - US Patent 9,431,068, 2016 - Google Patents
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Multi-dimension variable predictive modeling for analysis acceleration

RV Joshi, Y Shuf, J Sloan - US Patent 10,452,793, 2019 - Google Patents
In one example, a method for evaluating a system includes obtaining a model of the system
that defines a boundary between at least one failure region and a non-failure region for a …

Process for manufacturing an improved analog transistor

L Shifren, SE Thompson, PE Gregory - US Patent 8,748,270, 2014 - Google Patents
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Integrated circuits having a plurality of high-K metal gate FETs with various combinations of channel foundation structure and gate stack structure and methods of …

D Zhao, P Ranade, B McWilliams - US Patent 9,093,550, 2015 - Google Patents
(51) Int. Cl(57) ABSTRACT tion 21/8238 (2006.01) Semiconductor manufacturing processes
include forming HOIL 21/82(2006.015 conventional channel field effect transistors (FETs) …

Integrated circuit process and bias monitors and related methods

LT Clark, DA Kidd, CW Chen - US Patent 9,112,484, 2015 - Google Patents
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Semiconductor devices having fin structures and fabrication methods thereof

T Hoffmann, SE Thompson - US Patent 9,054,219, 2015 - Google Patents
A method of fabricating semiconductor devices includes pro viding a semiconducting
Substrate. The method also includes defining a heavily doped region at a surface of the …