Comprehensive Investigation of Back Gate Biasing on Performance of Line TFETs

Proposal & Investigation of Schottky Ring Engineered Reconfigurable Nanowire Transistor

S Panwar, S Srivastava, M Shashidhara… - … on Circuits and …, 2024 - ieeexplore.ieee.org
This work presents a junction-engineered Schottky Ring Engineered Reconfigurable
Nanowire Transistor (SR 2 NT) with a dual gate for the first time. Schottky Ring (SR) is …
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