A brief overview of gate oxide defect properties and their relation to MOSFET instabilities and device and circuit time-dependent variability
A paradigm for MOSFET instabilities is outlined based on gate oxide traps and the detailed
understanding of their properties. A model with trap energy levels in the gate dielectric and …
understanding of their properties. A model with trap energy levels in the gate dielectric and …
On the trap locations in bulk FinFETs after hot carrier degradation (HCD)
In this brief, typical locations of the interface and oxide traps generated by the hot carrier
degradation (HCD) in FinFETs are studied with experiments and “atomistic” TCAD …
degradation (HCD) in FinFETs are studied with experiments and “atomistic” TCAD …
Impact of Nitridation on Bias Temperature Instability and Hard Breakdown Characteristics of SiON MOSFETs
We study how nitridation, applied to SiON gate layers, impacts the reliability of planar metal-
oxide-semiconductor field effect transistors (MOSFETs) subjected to negative and positive …
oxide-semiconductor field effect transistors (MOSFETs) subjected to negative and positive …
The impact of self-heating on HCI reliability in high-performance digital circuits
While many groups attribute the greatly accelerated (ie, excess) HCI degradation in modern
transistors to the difference between the peak temperature and the average temperature (ΔT …
transistors to the difference between the peak temperature and the average temperature (ΔT …
Hot carrier degradation-induced dynamic variability in FinFETs: Experiments and modeling
In this article, the dynamic variability induced by hot carrier degradation (HCD) in FinFETs is
studied with decomposing the variation contributions of multiple types of traps. The …
studied with decomposing the variation contributions of multiple types of traps. The …
Characterization of time-dependent variability using 32k transistor arrays in an advanced HK/MG technology
Here we show that nFET and pFET time-dependent variability, in addition to the standard
time-zero variability, can be fully characterized and projected using a series of …
time-zero variability, can be fully characterized and projected using a series of …
Flexible setup for the measurement of CMOS time-dependent variability with array-based integrated circuits
J Diaz-Fortuny, P Saraza-Canflanca… - IEEE Transactions …, 2019 - ieeexplore.ieee.org
This paper presents an innovative and automated measurement setup for the
characterization of variability effects in CMOS transistors using array-based integrated …
characterization of variability effects in CMOS transistors using array-based integrated …
Investigation on the lateral trap distributions in nanoscale MOSFETs during hot carrier stress
In this letter, the lateral trap distributions in planar and FinFET devices are experimentally
studied under various bias stress conditions of hot-carrier degradation (HCD). In contrast to …
studied under various bias stress conditions of hot-carrier degradation (HCD). In contrast to …
Key issues and solutions for characterizing hot carrier aging of nanometer scale nMOSFETs
Silicon bandgap limits the reduction of operation voltage when downscaling device sizes.
This increases the electrical field within-a-device and hot carrier aging (HCA) is becoming …
This increases the electrical field within-a-device and hot carrier aging (HCA) is becoming …
Self-heating-aware CMOS reliability characterization using degradation maps
Time-dependent variability of modern VLSI devices, due to their associated degradation
mechanisms, such as Bias Temperature Instabilities (BTI) and Hot Carrier Degradation …
mechanisms, such as Bias Temperature Instabilities (BTI) and Hot Carrier Degradation …