Industrial process automation is becoming more advance due to the new technological
revolutions like Industrial Internet of things (IIoT), Machine to Machine Communication …

Multiprocessor system-on-chip (MP-SoC) platforms are emerging as an important trend for
SoC design. Power and wire design constraints are forcing the adoption of new design …

Over the past decade, system-on-chip (SoC) designs have evolved to address the ever
increasing complexity of applications, fueled by the era of digital convergence …

System on Chip (SoC) design in the forthcoming billion transistor era will involve the
integration of numerous heterogeneous semiconductor intellectual property (IP) blocks …

Due to shrinking technologies and increasing design sizes, it is becoming more difficult and
expensive to distribute a global clock signal with low skew throughout a processor die …

The design of many core systems-on-chip (SoCs) has become increasingly challenging due
to high levels of integration, excessive energy consumption and clock distribution problems …

We describe the design, analysis, and performance of an on-line algorithm to dynamically
control the frequency/voltage of a Multiple Clock Domain (MCD) microarchitecture. The MCD …

Due to high levels of integration and complexity, the design of multi-core SoCs has become
increasingly challenging. In particular, energy consumption and distributing a single global …

This paper presents several low-latency mixed-timing FIFO (first-in-first-out) interfaces
designs that interface systems on a chip working at different speeds. The connected systems …

Reliable, low-latency channel communication between independent clock domains may be
achieved using a combination of clock pausing techniques, self-calibrating delay lines and …