Method and apparatus utilizing non-uniformly distributed DRAM configurations and to detect in-range memory address matches
CC Kuo, S Lakshmanamurthy, R Natarajan… - US Patent …, 2007 - Google Patents
US7213099B2 - Method and apparatus utilizing non-uniformly distributed DRAM
configurations and to detect in-range memory address matches - Google Patents …
configurations and to detect in-range memory address matches - Google Patents …
Method and apparatus for maintaining one or more queues of elements such as commands using one or more token queues
DJ Harriman - US Patent 6,182,177, 2001 - Google Patents
A method and apparatus for queuing commands. An apparatus of the present invention
utilizes one or more token queues and a storage block to avoid maintaining multiple …
utilizes one or more token queues and a storage block to avoid maintaining multiple …
Mechanism for providing early coherency detection to enable high performance memory updates in a latency sensitive multithreaded environment
MB Rosenbluth, G Wolrich, D Bernstein - US Patent 7,216,204, 2007 - Google Patents
4.866, 664 4,868,735 4,992,934 5,008,808 5,073,864 5,113,516 5,140,685 5,142,676
5,142,683 5,155,831 5,155,854 5,165,025 5,166,872 5,168,555 5,173,897 5,247,671 …
5,142,683 5,155,831 5,155,854 5,165,025 5,166,872 5,168,555 5,173,897 5,247,671 …
Software controlled content addressable memory in a general purpose execution datapath
MB Rosenbluth, G Wolrich, D Bernstein - US Patent 6,868,476, 2005 - Google Patents
(57) ABSTRACT A lookup mechanism provides an input value to a datapath element
disposed in an execution datapath of a processor and causes the datapath element to …
disposed in an execution datapath of a processor and causes the datapath element to …
Arbitrating command requests in a parallel multi-threaded processing system
G Wolrich, D Bernstein, MJ Adiletta… - US Patent …, 2003 - Google Patents
A parallel, multi-threaded processor system and technique for arbitrating command requests
is described. The system includes a plurality of microengines, a plurality of shared system …
is described. The system includes a plurality of microengines, a plurality of shared system …
Thread signaling in multi-threaded processor
G Wolrich, D Bernstein, D Hooper, MJ Adiletta… - US Patent …, 2006 - Google Patents
4.866, 664 4,991, 112 5,115,507 5,140,685 5,142,683 5,155,831 5,155,854 5,168,555
5,173,897 5,255,239 5,263,169 5,347,648 5,367,678 5,390,329 5,392,391 5,392,411 …
5,173,897 5,255,239 5,263,169 5,347,648 5,367,678 5,390,329 5,392,391 5,392,411 …
Breakpoint method for parallel hardware threads in multithreaded processor
D Bernstein, S Kornfeld, DR Johnson… - US Patent …, 2006 - Google Patents
31 inserting a breakpoint after a program instruction in the selected microengine that
matches the program instruction received from the remote user interface, resuming program …
matches the program instruction received from the remote user interface, resuming program …
Multiprotocol decapsulation/encapsulation control structure and packet protocol conversion method
DF Hooper, SL Hirnak - US Patent 7,126,952, 2006 - Google Patents
US7126952B2 - Multiprotocol decapsulation/encapsulation control structure and packet protocol
conversion method - Google Patents US7126952B2 - Multiprotocol decapsulation/encapsulation …
conversion method - Google Patents US7126952B2 - Multiprotocol decapsulation/encapsulation …
Microengine for parallel processor architecture
D Bernstein, DF Hooper, MJ Adiletta, G Wolrich… - US Patent …, 2007 - Google Patents
A parallel hardware-based multithreaded processor is described. The processor includes a
general purpose processor that coordinates system functions and a plurality of microengines …
general purpose processor that coordinates system functions and a plurality of microengines …
Method and apparatus for gigabit packet assignment for multithreaded packet processing
G Wolrich, D Bernstein, MJ Adiletta… - US Patent …, 2010 - Google Patents
A network processor that has multiple processing elements, each supporting multiple
simultaneous program threads with access to shared resources in an interface. Packet data …
simultaneous program threads with access to shared resources in an interface. Packet data …