Embodiments of three-dimensional (3D) memory devices having a shielding layer and
methods for forming the 3D memory devices are disclosed. In an example, a 3D memory …

A vertical memory device may include gate electrodes on a substrate, a merged pattern
structure and a cell contact plug. The gate electrodes may be spaced apart in a first direction …

Embodiments of three-dimensional (3D) memory devices and methods for forming the 3D
memory devices are disclosed. In an example, a 3D memory device includes a substrate, a …

A semiconductor memory device including: a common source line; a substrate on the
common source line; a plurality of gate electrodes arranged on the substrate and spaced …

A vertical memory device and a method of manufacturing such device are provided. The
vertical memory device may include a plurality of gate electrode layers stacked in a cell …

According to an embodiment, a semiconductor memory device includes a substrate, a circuit
portion, a stacked body, at least one columnar member, a device isolation portion, and at …

Amemory device includes a peripheral circuit region includ ing a first substrate and circuit
elements on the first substrate, the circuit elements including a row decoder; a cell array …

(57) ABSTRACT A memory device comprises a peripheral circuit region including a first
substrate and circuit elements on the first substrate, the circuit elements including a row …

A vertical memory device includes a substrate, a plurality of gate electrodes vertically
stacked over the substrate in a cell array region, and a plurality of multi-layered pad portions …

A semiconductor memory device and a method of manufacturing the semiconductor memory
device are provided. The semiconductor memory device includes a channel layer with a first …