Implementation of short-term plasticity and long-term potentiation in a synapse using Si-based type of charge-trap memory

MS Lee, JW Lee, CH Kim, BG Park… - IEEE Transactions on …, 2015 - ieeexplore.ieee.org
We present a novel silicon-based type of charge-trap memory using Al/HfO 2/Al 2 O 3/Si 3 N
4/Si structure mimicking memory functions in a biological synapse. The quantity of the …

Simulation of DC and RF performance of the graphene base transistor

S Venica, F Driussi, P Palestri, D Esseni… - … on Electron Devices, 2014 - ieeexplore.ieee.org
We examined the DC and RF performance of the graphene base transistor (GBT) in the
ideal limit of unity common base current gain. To this purpose, we developed a model to …

Retention Enhancement in Low Power NOR Flash Array with High-κ–Based Charge-Trapping Memory by Utilizing High Permittivity and High Bandgap of Aluminum …

YS Song, BG Park - Micromachines, 2021 - mdpi.com
For improving retention characteristics in the NOR flash array, aluminum oxide (Al2O3,
alumina) is utilized and incorporated as a tunneling layer. The proposed tunneling layers …

Sub-1 nm Equivalent Oxide Thickness Al-HfO2 Trapping Layer with Excellent Thermal Stability and Retention for Nonvolatile Memory

S Spiga, F Driussi, G Congedo, C Wiemer… - ACS Applied Nano …, 2018 - ACS Publications
Memory stacks for charge trapping cells have been produced exploiting Al-doped HfO2,
Al2O3, and SiO2 made by atomic layer deposition. The fabricated stacks show superior …

Simulation Study of the Trapping Properties of -Based Charge-Trap Memory Cells

F Driussi, S Spiga, A Lamperti… - … on Electron Devices, 2014 - ieeexplore.ieee.org
In this paper, the trapping properties of HfO 2-based charge-trap cells have been extensively
studied by means of a synergic use of material analysis, electrical characterization, and …

ZnO/NiO diode-based charge-trapping layer for flash memory featuring low-voltage operation

CE Sun, CY Chen, KL Chu, YS Shen… - … Applied Materials & …, 2015 - ACS Publications
A stacked oxide semiconductor of n-type ZnO/p-type NiO with diode behavior was proposed
as the novel charge-trapping layer to enable low-voltage flash memory for green electronics …

Low temperature atomic layer deposited HfO2 film for high performance charge trapping flash memory application

G Chen, Z Huo, L Jin, D Zhang, S Zhao… - Semiconductor …, 2014 - iopscience.iop.org
The impact of key process parameters on the electrical characteristics of atomic layer
deposited HfO 2 films has been systematically studied with MHOS devices via capacitance …

An FET with a source tunneling barrier showing suppressed short-channel effects for low-power applications

YF Hsieh, SH Chen, NY Chen, WJ Lee… - … on Electron Devices, 2018 - ieeexplore.ieee.org
A device design technique using tunneling barriers (TBs) for reducing the short-channel
effects (SCEs) is proposed. By introducing TBs at the source and drain junctions of a Si FET …

High performance THANVaS memories for MLC charge trap NAND flash

A Suhane, A Arreghini, L Breuil… - 2011 3rd IEEE …, 2011 - ieeexplore.ieee.org
In this paper we investigate THANOS and THANVaS memory devices featuring a 2 nm HfO
2 capping layer on top of the AI 2 O 3 blocking dielectric. Furthermore, we benchmark these …

Investigation of charge loss characteristics of HfO2 annealed in N2 or O2 ambient

Y Chu, Z Huo, Y Han, G Chen, D Zhang… - Journal of …, 2014 - iopscience.iop.org
The retention characteristics of electrons and holes in hafnium oxide with post-deposition
annealing in a N 2 or O 2 ambient were investigated by Kelvin probe force microscopy. The …