A low-power analog integrated implementation of the support vector machine algorithm with on-chip learning tested on a bearing fault application

V Alimisis, G Gennis, M Gourdouparis, C Dimas… - Sensors, 2023 - mdpi.com
A novel analog integrated implementation of a hardware-friendly support vector machine
algorithm that can be a part of a classification system is presented in this work. The utilized …

Design and verification of petri-net-based cyber-physical systems oriented toward implementation in field-programmable gate arrays—a case study example

R Wiśniewski, M Wojnakowski, Z Li - Energies, 2022 - mdpi.com
This paper presents a novel design approach of a Petri-net-based cyber-physical system
(CPS). The idea is oriented toward implementation in a field-programmable gate array …

Artificial Intelligence Methods for Analysis and Optimization of CHP Cogeneration Units Based on Landfill Biogas as a Progress in Improving Energy Efficiency and …

K Gaska, A Generowicz, A Gronba-Chyła, J Ciuła… - Energies, 2023 - mdpi.com
Combined heat and power generation is the simultaneous conversion of primary energy (in
the form of fuel) in a technical system into useful thermal and mechanical energy (as the …

Parallel implementation on FPGA of support vector machines using stochastic gradient descent

FF Lopes, JC Ferreira, MAC Fernandes - Electronics, 2019 - mdpi.com
Sequential Minimal Optimization (SMO) is the traditional training algorithm for Support
Vector Machines (SVMs). However, SMO does not scale well with the size of the training set …

A hardware architecture for svpwm digital control with variable carrier frequency and amplitude

L Di Benedetto, A Donisi, GD Licciardo… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
A novel digital controller for the space-vector pulsewidth modulation (SVPWM) algorithm
used in three-phase power inverters is shown. From an analysis of the vector representation …

FPGA implementation of carrier-based PWM techniques for single-phase matrix converters

O Al-Dori, AM Vural - AEU-International Journal of Electronics and …, 2023 - Elsevier
Field programmable gate arrays (FPGAs) stand out as a highly efficient and reliable digital
solution to control power electronics converters. Direct single-to-single-phase matrix …

Implementation of hardware architecture for svpwm with arbitrary parameters

L Di Benedetto, A Donisi, GD Licciardo, R Liguori… - IEEE …, 2022 - ieeexplore.ieee.org
A novel hardware digital architecture for the Space Vector Pulse Width Modulation
technique is proposed. Its features are the reduced hardware resources and the real-time …

A hardware descriptive approach to beetle antennae search

Z Yue, G Li, X Jiang, S Li, J Cheng, P Ren - IEEE Access, 2020 - ieeexplore.ieee.org
Beetle antennae search (BAS) is a newly developed meta-heuristic algorithm which is
effectively used for optimizing objective functions of complex forms or even unknown forms …

A New Hardware Architecture for SVPWM Technique based on the Taylor decomposition

L Di Benedetto, A Donisi, R Liguori… - IEEE Journal of …, 2024 - ieeexplore.ieee.org
A novel hardware digital architecture for the space vector pulsewidth modulation (SVPWM)
technique is proposed and based on a novel algorithm for the evaluation of the dwell times …

A fully FPGA implementation of SVPWM for three-phase inverters without external reference signals

A Donisi, L Di Benedetto, GD Licciardo… - … on Environment and …, 2020 - ieeexplore.ieee.org
In this paper we propose a novel method to implement Space Vector Pulse Width
Modulation algorithm in Field Programmable Gate Array hardware. It is based on storing pre …