Compressive sensing image sensors-hardware implementation
The compressive sensing (CS) paradigm uses simultaneous sensing and compression to
provide an efficient image acquisition technique. The main advantages of the CS method …
provide an efficient image acquisition technique. The main advantages of the CS method …
CMOS image sensor with area-efficient block-based compressive sensing
We have designed, fabricated, and measured the performance of a linear and area-efficient
implementation of the compressive sensing (CS) method in CMOS image sensors. The use …
implementation of the compressive sensing (CS) method in CMOS image sensors. The use …
CMOS imager with focal-plane analog image compression combining DPCM and VQ
FDVR Oliveira, HL Haas, JGRC Gomes… - IEEE Transactions on …, 2013 - ieeexplore.ieee.org
CMOS imagers, in comparison to CCD image sensors, have the great advantage of allowing
for the implementation of signal processing circuitry inside the pixel matrix. We can extract …
for the implementation of signal processing circuitry inside the pixel matrix. We can extract …
Block-based CS in a CMOS image sensor
An implementation of the compressive sensing (CS) method with a CMOS image sensor is
presented. The conventional three-transistor active pixel sensor (APS) structure and …
presented. The conventional three-transistor active pixel sensor (APS) structure and …
1.1 TMACS/mW fine-grained stochastic resonant charge-recycling array processor
R Karakiewicz, R Genov… - IEEE Sensors …, 2011 - ieeexplore.ieee.org
We present a resonant adiabatic mixed-signal 128× 256 array processor that achieves the
energy efficiency of 1.1 TMACS (10 12 multiply accumulates per second) per mW of power …
energy efficiency of 1.1 TMACS (10 12 multiply accumulates per second) per mW of power …
Compressed learning for tactile object recognition
We present a framework for object recognition using robotic skins with embedded arrays of
tactile sensing elements. Our approach is based on theoretical foundations in compressed …
tactile sensing elements. Our approach is based on theoretical foundations in compressed …
Column-separated compressive sampling scheme for low power CMOS image sensors
A novel compressive sampling scheme suitable for highly scalable hardware
implementations is presented. The scheme utilizes an identical pseudo-random sequence …
implementations is presented. The scheme utilizes an identical pseudo-random sequence …
Compressive image acquisition in modern CMOS IC design
Compressive sampling (CS) offers bandwidth, power, and memory size reduction compared
to conventional (Nyquist) sampling. These are very attractive features for the design of …
to conventional (Nyquist) sampling. These are very attractive features for the design of …
Power-efficient CMOS image acquisition system based on compressive sampling
A novel compressive sampling scheme suitable for highly scalable hardware
implementations is presented. The prototype design is implemented in a 0.18 µm standard …
implementations is presented. The prototype design is implemented in a 0.18 µm standard …
Low power image acquisition scheme using on-pixel event driven halftoning
S Kodge, H Chaudhary… - 2017 IEEE Computer …, 2017 - ieeexplore.ieee.org
Several emerging IOT applications may require ultra-low power image-acquisition
techniques, at the cost of relaxed constraints on image quality. Event-driven imaging, based …
techniques, at the cost of relaxed constraints on image quality. Event-driven imaging, based …