Some embodiments include apparatus and methods using clock generation circuitry to
generate a first clock signal and a second clock signal based on an input clock signal, the …

Embodiments include systems and methods for improving link performance and tracking
capability of a baud-rate clock data recovery (CDR) system using transition pattern …

Adaptive equalizer circuitry including both a continuous time equalizer (CTE) and a discrete
time equalizer (DTE) and a method of jointly adapting the CTE and DTE in lane adaptation …

Methods and systems are described for measuring a vertical opening of a signal eye of a
pulse amplitude modulated (PAM) signal received over a channel to determine a vertically …

Methods and systems are described for adjusting the sample timing of a data sampler
operating in a data signal processing path having a decision threshold associated with a …

Methods and systems are described for asynchronously measuring an equalized
information signal to obtain amplitude information, modifying frequency dependent …

Methods and systems are described for measuring a vertical opening of a signal eye of a
pulse amplitude modulated (PAM) signal received over a channel to determine a vertically …

US11563605B2 - Horizontal centering of sampling point using multiple vertical voltage
measurements - Google Patents US11563605B2 - Horizontal centering of sampling point …

An equalizer control device includes a first circuit configured to, upon receipt of a data signal
that has been equalized by a continuous time linear equalizer (CTLE) circuit, output a first …

(57) ABSTRACT A reception device includes an equalization processing unit including a
linear filter unit and a nonlinear filter unit and performing equalization process on a …