Reconfigurability can be thought of as software-defined functionality, where flexibility is
controlled predominately through the specification of bit patterns. Reconfigurable systems …

Field programmable gate arrays (FPGAs) are widely used in applications where online
reconfigurable signal processing is required. Speed and function density of FPGAs are …

A novel hierarchical fault-tolerance methodology for reconfigurable devices is presented. A
bespoke multi-reconfigurable FPGA architecture, the programmable analogue and digital …

This paper explores the potential for transistor level fault tolerance on a new Programmable
Analogue and Digital Array (PAnDA) architecture1. In particular, this architecture features …

In this study, the authors present a design optimisation case study of D‐type flip‐flop timing
characteristics that are degraded as a result of intrinsic stochastic variability in a 25 nm …

Faults can occur in transistor circuits at any time, and increasingly so as fabrication
processes continue to shrink. This paper describes the use of evolution in creating fault …

The Programmable Analogue and Digital Array (PAnDA) is a novel reconfigurable
architecture, which allows variability aware design and rapid prototyping of digital systems …

This paper presents the concept of hierarchical reconfiguration strategies that can be
applied to a circuit on a reconfigurable architecture to change the implementation without …

Synthesis of analogue circuits, most commonly achieved by heuristic methods. In this paper
we show that the circuit topology used in the development of what semi-automatic and …

The random variations which are present at submicron technology nodes have been proven
to have significant impact on both yield and device performance. The circuit-scale effects of …