The scaling of microchip technologies has enabled large scale systems-on-chip (SoC).
Network-on-chip (NoC) research addresses global communication in SoC, involving (i) a …

In this paper we present a methodology to develop efficient and deadlock free routing
algorithms for Network-on-Chip (NoC) platforms which are specialized for an application or …

Abstract Network-on-Chip (NoC) is one of the basic chip designs with advantages and
challenges especially when the number of transistors increases and the data transfer rate …

Aggressive scaling of transistors allows integration of hundreds of processors on a chip.
However, on-chip interconnects carrying signals between different blocks will be the …

Routing algorithms for networks-on-chip (NoCs) typically only have a small number of virtual
channels (VCs) at their disposal. Limited VCs pose several challenges to the design of fully …

Freedom from deadlock is one of the most important issues when designing routing
algorithms in on-chip/off-chip networks. Many works have been developed upon Dally's …

Nowadays System-On-Chips (SoCs) have evolved considerably in term of performances,
reliability and integration capacity. The last advantage has induced the growth of the number …

Short and long packets co-exist in cache-coherent NoCs. Existing designs for torus networks
do not efficiently handle variable-size packets. For deadlock free operations, a design uses …

Logically separate channels sharing a physical link, so called virtual channels (VCs), have
wide spread uses in multicomputer networks as well as in Network-on-Chip (NoC). This …

Com o advento dos processos submicrônicos, a capacidade de integração de transistores
tem atingido níveis que possibilitam a construção de um sistema completo em uma única …