Bringing AI to edge: From deep learning's perspective

D Liu, H Kong, X Luo, W Liu, R Subramaniam - Neurocomputing, 2022 - Elsevier
Edge computing and artificial intelligence (AI), especially deep learning algorithms, are
gradually intersecting to build the novel system, namely edge intelligence. However, the …

An overview of today's high-level synthesis tools

W Meeus, K Van Beeck, T Goedemé, J Meel… - Design Automation for …, 2012 - Springer
High-level synthesis (HLS) is an increasingly popular approach in electronic design
automation (EDA) that raises the abstraction level for designing digital circuits. With the …

Hardware/software codesign: The past, the present, and predicting the future

J Teich - Proceedings of the IEEE, 2012 - ieeexplore.ieee.org
Hardware/software codesign investigates the concurrent design of hardware and software
components of complex electronic systems. It tries to exploit the synergy of hardware and …

Domain-specific architectures: Research problems and promising approaches

A Krishnakumar, U Ogras, R Marculescu… - ACM Transactions on …, 2023 - dl.acm.org
Process technology-driven performance and energy efficiency improvements have slowed
down as we approach physical design limits. General-purpose manycore architectures …

COSMOS: Coordination of high-level synthesis and memory optimization for hardware accelerators

L Piccolboni, P Mantovani, GD Guglielmo… - ACM Transactions on …, 2017 - dl.acm.org
Hardware accelerators are key to the efficiency and performance of system-on-chip (SoC)
architectures. With high-level synthesis (HLS), designers can easily obtain several …

Pareto optimal design space exploration of cyber-physical systems

M Amir, T Givargis - Internet of things, 2020 - Elsevier
Cyber-physical systems (CPS) integrate a variety of engineering areas such as control,
mechanical, and computer engineering in a holistic design effort. While interdependencies …

The TaPaSCo Open-Source Toolflow: for the Automated Composition of Task-Based Parallel Reconfigurable Computing Systems

C Heinz, J Hofmann, J Korinth, L Sommer… - Journal of Signal …, 2021 - Springer
The integration of FPGA-based accelerators into a complete heterogeneous system is a
challenging task faced by many researchers and engineers, especially now that FPGAs …

SPIRIT: Spectral-aware Pareto iterative refinement optimization for supervised high-level synthesis

S Xydis, G Palermo, V Zaccaria… - IEEE Transactions on …, 2014 - ieeexplore.ieee.org
Supervised high-level synthesis (HLS) is a new class of design problems where exploration
strategies play the role of supervisor for tuning an HLS engine. The complexity of the …

[图书][B] Computer system design: system-on-chip

MJ Flynn, W Luk - 2011 - books.google.com
The next generation of computer system designers will be less concerned about details of
processors and memories, and more concerned about the elements of a system tailored to …

Hard-real-time scheduling of data-dependent tasks in embedded streaming applications

M Bamakhrama, T Stefanov - Proceedings of the ninth ACM international …, 2011 - dl.acm.org
Most of the hard-real-time scheduling theory for multiprocessor systems assumes
independent periodic or sporadic tasks. Such a simple task model is not directly applicable …