This paper, proposes a low-voltage/power, high-speed configurable analog block (CAB) for
current-mode nonlinear computation. A novel MOS translinear cell (MTC), two local switch …

In this paper, a CMOS ultra-low-power, high-speed four-quadrant current multiplier/divider
circuit is presented. Based on square-difference approach, the proposed circuit is using a …

In this paper, a low-voltage and low-power current mode analog multiplier design is
presented. The multiplier is based on dynamic threshold MOS (DTMOS) structure. The …

In this paper, low-power, high-speed four-quadrant analog multiplier circuits have been
presented, based on simple current squarer circuits. The squarer circuits consist of a floating …

A new CMOS current-mode analog multifunction circuit is proposed. The proposed circuit is
capable of performing multiplication, squaring, division, and different types of controllable …

In this paper a novel configuration for an absolutely offset-free four-quadrant current
multiplier is introduced. The main idea is to compensate offset by adding its same value …

In this paper, an analog multiplier, the transistors of which operate in weak inversion area is
presented. The proposed multiplier have the features of transistors unification that brings …

A continuous‐time four‐quadrant multiplier in subthreshold region is presented. Besides its
simplicity, the structure features inherent process–voltage–temperature (PVT) variation …

In this paper, a CMOS low-power high-speed low-error four-quadrant analog multiplier
based on a simple current squarer circuit, is presented. The new squarer circuit consists of a …

A novel configuration of a four-quadrant current multiplier is introduced in this paper. The
realisation is achieved through the utilisation of the voltage translinear principle; the derived …