Energy efficient counter design using voltage scaling on FPGA
In this work, we are using voltage scaling to make the counter design as an energy efficient
design. The 74163 counter is a 4-bit fully synchronous counter that is available in both TTL …
design. The 74163 counter is a 4-bit fully synchronous counter that is available in both TTL …
Energy efficient flip flop design using voltage scaling on FPGA
In this work, we are using voltage scaling and frequency scaling. In voltage scaling, voltage
is scaled from 3V to 1V, where intermediate values are 2.5 V, 2V, 1.8 V and 1.5 V. In …
is scaled from 3V to 1V, where intermediate values are 2.5 V, 2V, 1.8 V and 1.5 V. In …
HDL implementation of high performance 16 bit processor on FPGA
In this work a general purpose 16 bit processor is designed and simulated on two 28nm
technology based FPGA's ie Atrix 7 and Kintex 7. Xilinx 14.2 has been used as the design …
technology based FPGA's ie Atrix 7 and Kintex 7. Xilinx 14.2 has been used as the design …
[DOC][DOC] Energy Efficient Counter Design Using Voltage Scaling On FPGA
In this work, we are using voltage scaling to make the counter design as an energy efficient
design. The 74163 counter is a 4-bit fully synchronous counter that is available in both TTL …
design. The 74163 counter is a 4-bit fully synchronous counter that is available in both TTL …
[PDF][PDF] Research (Publications)
P Mantry, A Chauhan - Pramana, 2022 - dr.du.ac.in
Research (Publications) Page 1 Research (Publications) • S. Kumar, WX Ma, SK Dhiman,
Astha Chauhan,” Lie Group Analysis with the Optimal System, Generalized Invariant …
Astha Chauhan,” Lie Group Analysis with the Optimal System, Generalized Invariant …