Error control coding for orthogonal differential vector signaling
H Cronie, A Shokrollahi - US Patent 9,667,379, 2017 - Google Patents
US9667379B2 - Error control coding for orthogonal differential vector signaling - Google Patents
US9667379B2 - Error control coding for orthogonal differential vector signaling - Google Patents …
US9667379B2 - Error control coding for orthogonal differential vector signaling - Google Patents …
Orthogonal differential vector signaling codes with embedded clock
B Holden, A Shokrollahi - US Patent 9,461,862, 2016 - Google Patents
Orthogonal differential vector signaling codes are described which support encoded sub-
channels allowing transport of distinct but temporally aligned data and clocking signals over …
channels allowing transport of distinct but temporally aligned data and clocking signals over …
Bus reversable orthogonal differential vector signaling codes
R Ulrich, A Shokrollahi - US Patent 9,432,082, 2016 - Google Patents
220 220 ferential Vector Signaling Codes are disclosed which are tolerant of order-reversal,
as may occur when physical routing of communications channel wires causes the bus signal …
as may occur when physical routing of communications channel wires causes the bus signal …
Vector signaling code with improved noise margin
A Shokrollahi - US Patent 9,509,437, 2016 - Google Patents
Methods are described allowing a vector signaling code to encode multi-level data without
the significant alphabet size increase known to cause symbol dynamic range compres sion …
the significant alphabet size increase known to cause symbol dynamic range compres sion …
High performance phase locked loop
A Tajalli - US Patent 10,057,049, 2018 - Google Patents
Methods and systems are described for receiving N phases of a local clock signal and M
phases of a reference signal, wherein M is an integer greater than or equal to 1 and N is an …
phases of a reference signal, wherein M is an integer greater than or equal to 1 and N is an …
Orthogonal differential vector signaling codes with embedded clock
A Shokrollahi - US Patent 10,055,372, 2018 - Google Patents
Orthogonal differential vector signaling codes are described which support encoded sub-
channels allowing transport of distinct data and clocking signals over the same transport …
channels allowing transport of distinct data and clocking signals over the same transport …
Multidrop data transfer
A Hormati, A Shokrollahi - US Patent 9,444,654, 2016 - Google Patents
H04B I/O(2006.01)(57) ABSTRACT H04L 25/02(2006.01) G06F I3/38(2006.01) Multi-drop
communications channels can have significantly (52) US Cl. deep notches in their frequency …
communications channels can have significantly (52) US Cl. deep notches in their frequency …
Multilevel driver for high speed chip-to-chip communications
R Ulrich - US Patent 9,544,015, 2017 - Google Patents
Transmission line driver systems are described which are comprised of multiple paralleled
driver elements. The paralleled structure allows efficient generation of multiple output signal …
driver elements. The paralleled structure allows efficient generation of multiple output signal …
Vector signaling codes with high pin-efficiency for chip-to-chip communication and storage
A Shokrollahi - US Patent 9,479,369, 2016 - Google Patents
An alternative type of vector signaling codes having increased pin-efficiency normal vector
signaling codes is described. Receivers for these Permutation Modulation codes of Type II …
signaling codes is described. Receivers for these Permutation Modulation codes of Type II …
Vector signaling codes for densely-routed wire groups
A Shokrollahi, A Hormati, A Tajalli - US Patent 10,333,741, 2019 - Google Patents
Methods and systems are described for receiving signal elements corresponding to a first
group of symbols of a vector signaling codeword over a first densely-routed wire group of a …
group of symbols of a vector signaling codeword over a first densely-routed wire group of a …