Multioperand redundant adders on FPGAs
Although redundant addition is widely used to design parallel multioperand adders for ASIC
implementations, the use of redundant adders on Field Programmable Gate Arrays (FPGAs) …
implementations, the use of redundant adders on Field Programmable Gate Arrays (FPGAs) …
[HTML][HTML] Formador digital de múltiples diagramas simultáneos basado en FPGA y el transceptor AD9361
AR Ramírez Zaldívar, N Rojas Ramírez… - Ingeniería Electrónica …, 2022 - scielo.sld.cu
El presente trabajo muestra el proceso de obtención de un formador digital de múltiples
diagramas direccionales simultáneos para la recepción de señales utilizando la tarjeta de …
diagramas direccionales simultáneos para la recepción de señales utilizando la tarjeta de …
FPGA implementation of wavelet neural network training with PSO/iPSO
S Sahin, MA Cavuslu - Journal of Circuits, Systems and Computers, 2018 - World Scientific
In this study, field-programmable gate array (FPGA)-based hardware implementation of the
wavelet neural network (WNN) training using particle swarm optimization (PSO) and …
wavelet neural network (WNN) training using particle swarm optimization (PSO) and …
An FPGA implementation of novel smart antenna algorithm in tracking systems for smart cities
C Thiripurasundari, V Sumathy… - Computers & Electrical …, 2018 - Elsevier
The area of digital signal processing (DSP) faces a great challenge in suppressing the noise
and interference in the transmitting signal. A huge number of applications are in need of …
and interference in the transmitting signal. A huge number of applications are in need of …
Realization of PSO-based adaptive beamforming algorithm for smart antennas
A novel beamforming technique based on Particle Swarm Optimization (PSO) algorithm and
its subsequent implementation on Xilinx Virtex4 Field-Programmable Gate Arrays (FPGA) …
its subsequent implementation on Xilinx Virtex4 Field-Programmable Gate Arrays (FPGA) …
Efficient implementation of space–time adaptive processing for adaptive weights calculation based on floating point FPGAs
N Hasanikhah, S Amin-Nejad, G Darvish… - The Journal of …, 2018 - Springer
Abstract Space–time adaptive processing (STAP) has an enormous computational
complexity which has confined its practical applications. In this paper, we present an …
complexity which has confined its practical applications. In this paper, we present an …
Realization of adaptive beamforming in smart antennas on a reconfigurable architecture
This paper proposes an efficient beamforming algorithm that suits well in smart antennas for
the secured wireless communications. Also, its subsequent implementation methodology on …
the secured wireless communications. Also, its subsequent implementation methodology on …
Comparison of practical methods for an efficient FPGA implementation of STAP
N Hasanikhah, S Amin-Nejad, G Darvish… - International Journal of …, 2019 - Taylor & Francis
In this paper, practical methods for an efficient field programmable gate array (FPGA)
implementation of space-time adaptive processing (STAP) are investigated and compared …
implementation of space-time adaptive processing (STAP) are investigated and compared …
[PDF][PDF] Multioperand redundant adders on FPGAs
M Md, TS Kumar - International journal of scientific engineering and …, 2014 - ijsetr.com
Although redundant addition is widely used to design parallel multi-operand adders for ASIC
implementations, the use of redundant adders on Field Programmable Gate Arrays (FPGAs) …
implementations, the use of redundant adders on Field Programmable Gate Arrays (FPGAs) …
A Reconfigurable Smart Antenna Beamforming Architecture for Secure Localization Applications
Beamforming of an adaptive array antenna often becomes effective for the precise
localization of nodes in wireless sensor networks. In an erratic channel, a link with possibly a …
localization of nodes in wireless sensor networks. In an erratic channel, a link with possibly a …